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Searched refs:socclk (Results 1 – 15 of 15) sorted by relevance

/drivers/gpu/drm/amd/pm/swsmu/smu12/
Dsmu_v12_0.c343 smu->smu_table.boot_values.socclk = 0; in smu_v12_0_get_vbios_bootup_values()
360 smu->smu_table.boot_values.socclk = 0; in smu_v12_0_get_vbios_bootup_values()
377 &smu->smu_table.boot_values.socclk); in smu_v12_0_get_vbios_bootup_values()
Drenoir_ppt.c291 clock_limit = smu->smu_table.boot_values.socclk; in renoir_get_dpm_ultimate_freq()
/drivers/gpu/drm/amd/pm/swsmu/smu13/
Dsmu_v13_0.c539 smu->smu_table.boot_values.socclk = 0; in smu_v13_0_get_vbios_bootup_values()
553 smu->smu_table.boot_values.socclk = 0; in smu_v13_0_get_vbios_bootup_values()
568 smu->smu_table.boot_values.socclk = 0; in smu_v13_0_get_vbios_bootup_values()
585 &smu->smu_table.boot_values.socclk); in smu_v13_0_get_vbios_bootup_values()
850 max_sustainable_clocks->soc_clock = smu->smu_table.boot_values.socclk / 100; in smu_v13_0_init_max_sustainable_clocks()
1498 clock_limit = smu->smu_table.boot_values.socclk; in smu_v13_0_get_dpm_ultimate_freq()
Dyellow_carp_ppt.c942 clock_limit = smu->smu_table.boot_values.socclk; in yellow_carp_get_dpm_ultimate_freq()
Daldebaran_ppt.c308 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.socclk / 100; in aldebaran_set_default_dpm_table()
/drivers/gpu/drm/amd/display/dc/inc/
Ddcn_calcs.h127 float socclk; member
564 float socclk; /*MHz*/ member
/drivers/gpu/drm/amd/pm/swsmu/smu11/
Dsmu_v11_0.c575 smu->smu_table.boot_values.socclk = 0; in smu_v11_0_get_vbios_bootup_values()
592 smu->smu_table.boot_values.socclk = 0; in smu_v11_0_get_vbios_bootup_values()
609 &smu->smu_table.boot_values.socclk); in smu_v11_0_get_vbios_bootup_values()
876 max_sustainable_clocks->soc_clock = smu->smu_table.boot_values.socclk / 100; in smu_v11_0_init_max_sustainable_clocks()
1750 clock_limit = smu->smu_table.boot_values.socclk; in smu_v11_0_get_dpm_ultimate_freq()
Dvangogh_ppt.c914 clock_limit = smu->smu_table.boot_values.socclk; in vangogh_get_dpm_ultimate_freq()
Darcturus_ppt.c358 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.socclk / 100; in arcturus_set_default_dpm_table()
Dnavi10_ppt.c997 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.socclk / 100; in navi10_set_default_dpm_table()
Dsienna_cichlid_ppt.c736 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.socclk / 100; in sienna_cichlid_set_default_dpm_table()
/drivers/gpu/drm/amd/display/dc/calcs/
Ddcn_calcs.c113 .socclk = 208, /*MHz*/
495 input.clks_cfg.socclk_mhz = v->socclk; in dcn_bw_calc_rq_dlg_ttu()
813 v->socclk = dc->dcn_soc->socclk; in dcn_validate_bandwidth()
1561 socclk_khz = dc->dcn_soc->socclk * 1000; in dcn_bw_notify_pplib_of_wm_ranges()
1666 dc->dcn_soc->socclk * 1000, in dcn_bw_sync_calcs_and_dml()
Ddcn_calc_auto.c1337 …clock_change_latency + v->write_back_latency + v->writeback_chunk_size * 1024.0 / 32.0 / v->socclk; in dispclkdppclkdcfclk_deep_sleep_prefetch_parameters_watermarks_and_performance_calculation()
/drivers/gpu/drm/amd/pm/inc/
Damdgpu_smu.h293 uint32_t socclk; member
/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
Dvega10_hwmgr.c518 uint16_t virtual_voltage_id, int32_t *socclk) in vega10_get_socclk_for_voltage_evv() argument
540 *socclk = table_info->vdd_dep_on_socclk->entries[entry_id].clk; in vega10_get_socclk_for_voltage_evv()