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Searched refs:CLK_PLL_DDR0 (Results 1 – 8 of 8) sorted by relevance

/device/board/isoftstone/zhiyuan/kernel/driver/include/dt-bindings/clock/
Dsun50iw9-ccu.h11 #define CLK_PLL_DDR0 2 macro
Dsun50iw12-ccu.h11 #define CLK_PLL_DDR0 2 macro
Dsun50iw10-ccu.h11 #define CLK_PLL_DDR0 2 macro
Dsun8iw20-ccu.h11 #define CLK_PLL_DDR0 2 macro
/device/board/isoftstone/zhiyuan/kernel/driver/drivers/clk/
Dccu-sun50iw9.c923 [CLK_PLL_DDR0] = &pll_ddr0_clk.common.hw,
Dccu-sun8iw20.c937 [CLK_PLL_DDR0] = &pll_ddr0_clk.common.hw,
Dccu-sun50iw12.c1086 [CLK_PLL_DDR0] = &pll_ddr_clk.common.hw,
Dccu-sun50iw10.c1036 [CLK_PLL_DDR0] = &pll_ddr0_clk.common.hw,