| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/GlobalISel/ |
| D | CallLowering.cpp | 28 ArrayRef<unsigned> ArgRegs, std::function<unsigned()> GetCalleeReg) const { in lowerCall()
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| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMFastISel.cpp | 1560 SmallVectorImpl<unsigned> &ArgRegs, in ProcessCallArgs()
1815 SmallVector<unsigned, 8> ArgRegs; in ARMEmitLibcall() local
1913 SmallVector<unsigned, 8> ArgRegs; in SelectCall() local
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| D | ARMFastISel.cpp | 1897 SmallVectorImpl<unsigned> &ArgRegs, in ProcessCallArgs()
2235 SmallVector<unsigned, 8> ArgRegs; in ARMEmitLibcall() local
2344 SmallVector<unsigned, 8> ArgRegs; in SelectCall() local
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMFastISel.cpp | 1871 SmallVectorImpl<unsigned> &ArgRegs, in ProcessCallArgs()
2209 SmallVector<unsigned, 8> ArgRegs; in ARMEmitLibcall() local
2319 SmallVector<unsigned, 8> ArgRegs; in SelectCall() local
|
| /external/llvm/lib/Target/PowerPC/ |
| D | PPCFastISel.cpp | 1278 SmallVectorImpl<unsigned> &ArgRegs, in processCallArgs()
1509 SmallVector<unsigned, 8> ArgRegs; in fastLowerCall() local
|
| D | PPCISelLowering.cpp | 2673 static const MCPhysReg ArgRegs[] = { in CC_PPC32_SVR4_Custom_AlignArgRegs() local
2700 static const MCPhysReg ArgRegs[] = { in CC_PPC32_SVR4_Custom_AlignFPArgRegs() local
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
| D | PPCFastISel.cpp | 1365 SmallVectorImpl<unsigned> &ArgRegs, in processCallArgs()
1596 SmallVector<unsigned, 8> ArgRegs; in fastLowerCall() local
|
| D | PPCISelLowering.cpp | 3131 static const MCPhysReg ArgRegs[] = { in CC_PPC32_SVR4_Custom_AlignArgRegs() local
3159 static const MCPhysReg ArgRegs[] = { in CC_PPC32_SVR4_Custom_SkipLastArgRegsPPCF128() local
3184 static const MCPhysReg ArgRegs[] = { in CC_PPC32_SVR4_Custom_AlignFPArgRegs() local
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARC/ |
| D | ARCISelLowering.cpp | 522 static const MCPhysReg ArgRegs[] = {ARC::R0, ARC::R1, ARC::R2, ARC::R3, in LowerCallArguments() local
|
| /external/swiftshader/third_party/LLVM/lib/Target/MBlaze/ |
| D | MBlazeISelLowering.cpp | 659 static const unsigned ArgRegs[] = { in CC_MBlaze_AssignReg() local
|
| /external/swiftshader/third_party/LLVM/lib/Target/Sparc/ |
| D | SparcISelLowering.cpp | 305 static const unsigned ArgRegs[] = { in LowerFormalArguments() local
|
| /external/swiftshader/third_party/LLVM/lib/Target/XCore/ |
| D | XCoreISelLowering.cpp | 1146 static const unsigned ArgRegs[] = { in LowerCCCArguments() local
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/RISCV/ |
| D | RISCVISelLowering.cpp | 1032 ArrayRef<MCPhysReg> ArgRegs = makeArrayRef(ArgGPRs); in LowerFormalArguments() local
|
| /external/llvm/lib/Target/Mips/ |
| D | MipsISelLowering.cpp | 3785 ArrayRef<MCPhysReg> ArgRegs = ABI.GetByValArgRegs(); in passByValArg() local
3871 ArrayRef<MCPhysReg> ArgRegs = ABI.GetVarArgRegs(); in writeVarArgRegs() local
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/ |
| D | MipsISelLowering.cpp | 4093 ArrayRef<MCPhysReg> ArgRegs = ABI.GetByValArgRegs(); in passByValArg() local
4177 ArrayRef<MCPhysReg> ArgRegs = ABI.GetVarArgRegs(); in writeVarArgRegs() local
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/XCore/ |
| D | XCoreISelLowering.cpp | 1340 static const MCPhysReg ArgRegs[] = { in LowerCCCArguments() local
|
| /external/llvm/lib/Target/XCore/ |
| D | XCoreISelLowering.cpp | 1357 static const MCPhysReg ArgRegs[] = { in LowerCCCArguments() local
|
| /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 1533 static const unsigned ArgRegs[] = { in CC_PPC_SVR4_Custom_AlignArgRegs() local
1560 static const unsigned ArgRegs[] = { in CC_PPC_SVR4_Custom_AlignFPArgRegs() local
|
| /external/swiftshader/third_party/LLVM/lib/Target/CellSPU/ |
| D | SPUISelLowering.cpp | 1201 static const unsigned ArgRegs[] = { in LowerFormalArguments() local
|
| /external/llvm/lib/Target/X86/ |
| D | X86FastISel.cpp | 3059 SmallVector<unsigned, 16> ArgRegs; in fastLowerCall() local
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
| D | X86FastISel.cpp | 3267 SmallVector<unsigned, 16> ArgRegs; in fastLowerCall() local
|
| /external/llvm/lib/Target/Sparc/ |
| D | SparcISelLowering.cpp | 542 static const MCPhysReg ArgRegs[] = { in LowerFormalArguments_32() local
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Sparc/ |
| D | SparcISelLowering.cpp | 536 static const MCPhysReg ArgRegs[] = { in LowerFormalArguments_32() local
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLowering.cpp | 134 static const MCPhysReg ArgRegs[] = { in CC_SkipOdd() local
|