/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
D | FastISel.cpp | 351 unsigned ResultReg = FastEmit_ri_(VT.getSimpleVT(), ISDOpcode, Op1, in SelectBinaryOp() local 380 unsigned ResultReg = FastEmit_ri_(VT.getSimpleVT(), ISDOpcode, Op0, in SelectBinaryOp() local 391 unsigned ResultReg = FastEmit_rf(VT.getSimpleVT(), VT.getSimpleVT(), in SelectBinaryOp() local 408 unsigned ResultReg = FastEmit_rr(VT.getSimpleVT(), VT.getSimpleVT(), in SelectBinaryOp() local 593 unsigned ResultReg = createResultReg(RC); in SelectCall() local 617 unsigned ResultReg = createResultReg(RC); in SelectCall() local 642 unsigned ResultReg = getRegForValue(ResCI); in SelectCall() local 688 unsigned ResultReg = FastEmit_r(SrcVT.getSimpleVT(), in SelectCast() local 727 unsigned ResultReg = 0; in SelectBitCast() local 803 unsigned ResultReg = FastEmit_r(VT.getSimpleVT(), VT.getSimpleVT(), in SelectFNeg() local [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
D | AArch64FastISel.cpp | 369 unsigned ResultReg = createResultReg(&AArch64::GPR64spRegClass); in fastMaterializeAlloca() local 392 unsigned ResultReg = createResultReg(RC); in materializeInt() local 429 unsigned ResultReg = createResultReg(TLI.getRegClassFor(VT)); in materializeFP() local 449 unsigned ResultReg = createResultReg(TLI.getRegClassFor(VT)); in materializeFP() local 473 unsigned ResultReg; in materializeGV() local 1023 unsigned ResultReg = createResultReg(&AArch64::GPR64spRegClass); in simplifyAddress() local 1034 unsigned ResultReg = 0; in simplifyAddress() local 1072 unsigned ResultReg; in simplifyAddress() local 1179 unsigned ResultReg = 0; in emitAddSub() local 1304 unsigned ResultReg; in emitAddSub_rr() local [all …]
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D | AArch64InstrInfo.cpp | 4044 unsigned ResultReg = Root.getOperand(0).getReg(); in genFusedMultiply() local 4121 unsigned ResultReg = Root.getOperand(0).getReg(); in genMaddR() local
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/external/llvm/lib/Target/AArch64/ |
D | AArch64FastISel.cpp | 323 unsigned ResultReg = createResultReg(&AArch64::GPR64spRegClass); in fastMaterializeAlloca() local 346 unsigned ResultReg = createResultReg(RC); in materializeInt() local 383 unsigned ResultReg = createResultReg(TLI.getRegClassFor(VT)); in materializeFP() local 403 unsigned ResultReg = createResultReg(TLI.getRegClassFor(VT)); in materializeFP() local 427 unsigned ResultReg; in materializeGV() local 977 unsigned ResultReg = createResultReg(&AArch64::GPR64spRegClass); in simplifyAddress() local 988 unsigned ResultReg = 0; in simplifyAddress() local 1026 unsigned ResultReg; in simplifyAddress() local 1133 unsigned ResultReg = 0; in emitAddSub() local 1254 unsigned ResultReg; in emitAddSub_rr() local [all …]
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D | AArch64InstrInfo.cpp | 3289 unsigned ResultReg = Root.getOperand(0).getReg(); in genFusedMultiply() local 3353 unsigned ResultReg = Root.getOperand(0).getReg(); in genMaddR() local
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/external/swiftshader/third_party/LLVM/lib/Target/X86/ |
D | X86FastISel.cpp | 177 unsigned &ResultReg) { in X86FastEmitLoad() 312 unsigned &ResultReg) { in X86FastEmitExtend() 811 unsigned ResultReg = 0; in X86SelectLoad() local 896 unsigned ResultReg = createResultReg(&X86::GR8RegClass); in X86SelectCmp() local 976 unsigned ResultReg = getRegForValue(I->getOperand(0)); in X86SelectZExt() local 1188 unsigned ResultReg = createResultReg(RC); in X86SelectShift() local 1227 unsigned ResultReg = createResultReg(RC); in X86SelectSelect() local 1242 unsigned ResultReg = createResultReg(X86::FR64RegisterClass); in X86SelectFPExt() local 1261 unsigned ResultReg = createResultReg(X86::FR32RegisterClass); in X86SelectFPTrunc() local 1307 unsigned ResultReg = FastEmitInst_extractsubreg(MVT::i8, in X86SelectTrunc() local [all …]
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/external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
D | ARMFastISel.cpp | 280 unsigned ResultReg = createResultReg(RC); in FastEmitInst_() local 290 unsigned ResultReg = createResultReg(RC); in FastEmitInst_r() local 310 unsigned ResultReg = createResultReg(RC); in FastEmitInst_rr() local 333 unsigned ResultReg = createResultReg(RC); in FastEmitInst_rrr() local 357 unsigned ResultReg = createResultReg(RC); in FastEmitInst_ri() local 379 unsigned ResultReg = createResultReg(RC); in FastEmitInst_rf() local 402 unsigned ResultReg = createResultReg(RC); in FastEmitInst_rri() local 425 unsigned ResultReg = createResultReg(RC); in FastEmitInst_i() local 444 unsigned ResultReg = createResultReg(RC); in FastEmitInst_ii() local 464 unsigned ResultReg = createResultReg(TLI.getRegClassFor(RetVT)); in FastEmitInst_extractsubreg() local [all …]
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/external/llvm/lib/Target/X86/ |
D | X86FastISel.cpp | 349 MachineMemOperand *MMO, unsigned &ResultReg, in X86FastEmitLoad() 697 unsigned &ResultReg) { in X86FastEmitExtend() 1319 unsigned ResultReg = 0; in X86SelectLoad() local 1420 unsigned ResultReg = 0; in X86SelectCmp() local 1510 unsigned ResultReg = getRegForValue(I->getOperand(0)); in X86SelectZExt() local 1763 unsigned ResultReg = createResultReg(RC); in X86SelectShift() local 1906 unsigned ResultReg = 0; in X86SelectDivRem() local 2045 unsigned ResultReg = fastEmitInst_rr(Opc, RC, RHSReg, RHSIsKill, in X86FastEmitCMoveSelect() local 2123 unsigned ResultReg; in X86FastEmitSSESelect() local 2218 unsigned ResultReg = in X86FastEmitPseudoSelect() local [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
D | X86FastISel.cpp | 321 MachineMemOperand *MMO, unsigned &ResultReg, in X86FastEmitLoad() 720 unsigned &ResultReg) { in X86FastEmitExtend() 1341 unsigned ResultReg = 0; in X86SelectLoad() local 1446 unsigned ResultReg = 0; in X86SelectCmp() local 1536 unsigned ResultReg = getRegForValue(I->getOperand(0)); in X86SelectZExt() local 1595 unsigned ResultReg = getRegForValue(I->getOperand(0)); in X86SelectSExt() local 1857 unsigned ResultReg = createResultReg(RC); in X86SelectShift() local 2000 unsigned ResultReg = 0; in X86SelectDivRem() local 2151 unsigned ResultReg = fastEmitInst_rr(Opc, RC, RHSReg, RHSIsKill, in X86FastEmitCMoveSelect() local 2229 unsigned ResultReg; in X86FastEmitSSESelect() local [all …]
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D | X86FlagsCopyLowering.cpp | 1016 unsigned ResultReg = MRI->createVirtualRegister(&SetBRC); in rewriteSetCarryExtended() local
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/external/llvm/lib/CodeGen/SelectionDAG/ |
D | FastISel.cpp | 414 unsigned ResultReg = in selectBinaryOp() local 448 unsigned ResultReg = fastEmit_ri_(VT.getSimpleVT(), ISDOpcode, Op0, in selectBinaryOp() local 460 unsigned ResultReg = fastEmit_rf(VT.getSimpleVT(), VT.getSimpleVT(), in selectBinaryOp() local 475 unsigned ResultReg = fastEmit_rr(VT.getSimpleVT(), VT.getSimpleVT(), in selectBinaryOp() local 1222 unsigned ResultReg = getRegForValue(ResCI); in selectIntrinsicCall() local 1229 unsigned ResultReg = getRegForValue(II->getArgOperand(0)); in selectIntrinsicCall() local 1269 unsigned ResultReg = fastEmit_r(SrcVT.getSimpleVT(), DstVT.getSimpleVT(), in selectCast() local 1304 unsigned ResultReg = 0; in selectBitCast() local 1485 unsigned ResultReg = fastEmit_r(VT.getSimpleVT(), VT.getSimpleVT(), ISD::FNEG, in selectFNeg() local 1538 unsigned ResultReg; in selectExtractValue() local [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/ |
D | FastISel.cpp | 603 unsigned ResultReg = in selectBinaryOp() local 637 unsigned ResultReg = fastEmit_ri_(VT.getSimpleVT(), ISDOpcode, Op0, in selectBinaryOp() local 653 unsigned ResultReg = fastEmit_rr(VT.getSimpleVT(), VT.getSimpleVT(), in selectBinaryOp() local 1433 unsigned ResultReg = getRegForValue(ResCI); in selectIntrinsicCall() local 1442 unsigned ResultReg = getRegForValue(II->getArgOperand(0)); in selectIntrinsicCall() local 1487 unsigned ResultReg = fastEmit_r(SrcVT.getSimpleVT(), DstVT.getSimpleVT(), in selectCast() local 1522 unsigned ResultReg = 0; in selectBitCast() local 1690 unsigned ResultReg = fastEmit_r(VT.getSimpleVT(), VT.getSimpleVT(), ISD::FNEG, in selectFNeg() local 1743 unsigned ResultReg; in selectExtractValue() local 1954 unsigned ResultReg = fastEmit_ri(VT, VT, Opcode, Op0, Op0IsKill, Imm); in fastEmit_ri_() local [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
D | ARMFastISel.cpp | 307 unsigned ResultReg = createResultReg(RC); in fastEmitInst_r() local 330 unsigned ResultReg = createResultReg(RC); in fastEmitInst_rr() local 358 unsigned ResultReg = createResultReg(RC); in fastEmitInst_ri() local 383 unsigned ResultReg = createResultReg(RC); in fastEmitInst_i() local 502 unsigned ResultReg = 0; in ARMMaterializeInt() local 679 unsigned ResultReg = createResultReg(RC); in fastMaterializeAlloca() local 854 unsigned ResultReg = createResultReg(RC); in ARMSimplifyAddress() local 919 bool ARMFastISel::ARMEmitLoad(MVT VT, unsigned &ResultReg, Address &Addr, in ARMEmitLoad() 1050 unsigned ResultReg; in SelectLoad() local 1586 unsigned ResultReg = createResultReg(TLI.getRegClassFor(DstVT)); in SelectIToFP() local [all …]
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/external/llvm/lib/Target/WebAssembly/ |
D | WebAssemblyFastISel.cpp | 516 unsigned ResultReg = createResultReg(MRI.getRegClass(Reg)); in copyValue() local 528 unsigned ResultReg = createResultReg(Subtarget->hasAddr64() ? in fastMaterializeAlloca() local 544 unsigned ResultReg = createResultReg(Subtarget->hasAddr64() ? in fastMaterializeConstant() local 606 unsigned ResultReg = createResultReg(RC); in fastLowerArguments() local 638 unsigned ResultReg; in selectCall() local 761 unsigned ResultReg = createResultReg(RC); in selectSelect() local 870 unsigned ResultReg = createResultReg(&WebAssembly::I32RegClass); in selectICmp() local 931 unsigned ResultReg = createResultReg(&WebAssembly::I32RegClass); in selectFCmp() local 1016 unsigned ResultReg = createResultReg(RC); in selectLoad() local 1074 unsigned ResultReg = createResultReg(RC); in selectStore() local
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/external/llvm/lib/Target/ARM/ |
D | ARMFastISel.cpp | 281 unsigned ResultReg = createResultReg(RC); in fastEmitInst_r() local 304 unsigned ResultReg = createResultReg(RC); in fastEmitInst_rr() local 332 unsigned ResultReg = createResultReg(RC); in fastEmitInst_ri() local 359 unsigned ResultReg = createResultReg(RC); in fastEmitInst_rri() local 387 unsigned ResultReg = createResultReg(RC); in fastEmitInst_i() local 507 unsigned ResultReg = 0; in ARMMaterializeInt() local 680 unsigned ResultReg = createResultReg(RC); in fastMaterializeAlloca() local 855 unsigned ResultReg = createResultReg(RC); in ARMSimplifyAddress() local 919 bool ARMFastISel::ARMEmitLoad(MVT VT, unsigned &ResultReg, Address &Addr, in ARMEmitLoad() 1050 unsigned ResultReg; in SelectLoad() local [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/WebAssembly/ |
D | WebAssemblyFastISel.cpp | 581 unsigned ResultReg = createResultReg(MRI.getRegClass(Reg)); in copyValue() local 593 unsigned ResultReg = createResultReg(Subtarget->hasAddr64() ? in fastMaterializeAlloca() local 609 unsigned ResultReg = createResultReg(Subtarget->hasAddr64() ? in fastMaterializeConstant() local 693 unsigned ResultReg = createResultReg(RC); in fastLowerArguments() local 743 unsigned ResultReg; in selectCall() local 902 unsigned ResultReg = createResultReg(RC); in selectSelect() local 1017 unsigned ResultReg = createResultReg(&WebAssembly::I32RegClass); in selectICmp() local 1078 unsigned ResultReg = createResultReg(&WebAssembly::I32RegClass); in selectFCmp() local 1168 unsigned ResultReg = createResultReg(RC); in selectLoad() local
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/ |
D | MipsFastISel.cpp | 327 unsigned ResultReg = createResultReg(&Mips::GPR32RegClass); in emitLogicalOp() local 343 unsigned ResultReg = createResultReg(&Mips::GPR32RegClass); in fastMaterializeAlloca() local 364 unsigned ResultReg = createResultReg(RC); in materialize32BitInt() local 636 bool MipsFastISel::emitCmp(unsigned ResultReg, const CmpInst *CI) { in emitCmp() 755 bool MipsFastISel::emitLoad(MVT VT, unsigned &ResultReg, Address &Addr, in emitLoad() 868 unsigned ResultReg; in selectLogicalOp() local 905 unsigned ResultReg; in selectLoad() local 973 unsigned ResultReg = createResultReg(&Mips::GPR32RegClass); in selectCmp() local 1046 unsigned ResultReg = createResultReg(RC); in selectSelect() local 1279 unsigned ResultReg = createResultReg(TLI.getRegClassFor(CopyVT)); in finishCall() local [all …]
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/external/llvm/lib/Target/Mips/ |
D | MipsFastISel.cpp | 279 unsigned ResultReg = createResultReg(&Mips::GPR32RegClass); in emitLogicalOp() local 298 unsigned ResultReg = createResultReg(&Mips::GPR32RegClass); in fastMaterializeAlloca() local 319 unsigned ResultReg = createResultReg(RC); in materialize32BitInt() local 595 bool MipsFastISel::emitCmp(unsigned ResultReg, const CmpInst *CI) { in emitCmp() 717 bool MipsFastISel::emitLoad(MVT VT, unsigned &ResultReg, Address &Addr, in emitLoad() 835 unsigned ResultReg; in selectLogicalOp() local 872 unsigned ResultReg; in selectLoad() local 940 unsigned ResultReg = createResultReg(&Mips::GPR32RegClass); in selectCmp() local 1008 unsigned ResultReg = createResultReg(RC); in selectSelect() local 1238 unsigned ResultReg = createResultReg(TLI.getRegClassFor(CopyVT)); in finishCall() local [all …]
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/external/llvm/lib/Target/PowerPC/ |
D | PPCFastISel.cpp | 443 unsigned ResultReg = createResultReg(&PPC::G8RC_and_G8RC_NOX0RegClass); in PPCSimplifyAddress() local 462 bool PPCFastISel::PPCEmitLoad(MVT VT, unsigned &ResultReg, Address &Addr, in PPCEmitLoad() 612 unsigned ResultReg = 0; in SelectLoad() local 989 unsigned ResultReg = 0; in PPCMoveToFPReg() local 1098 unsigned ResultReg = 0; in PPCMoveToIntReg() local 1203 unsigned ResultReg = createResultReg(RC ? RC : &PPC::G8RCRegClass); in SelectBinaryIntOp() local 1421 unsigned ResultReg = 0; in finishCall() local 1800 unsigned ResultReg = createResultReg(&PPC::GPRCRegClass); in SelectTrunc() local 1841 unsigned ResultReg = createResultReg(RC); in SelectIntExt() local 2011 unsigned ResultReg = createResultReg(RC); in PPCMaterialize32BitInt() local [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
D | PPCFastISel.cpp | 446 unsigned ResultReg = createResultReg(&PPC::G8RC_and_G8RC_NOX0RegClass); in PPCSimplifyAddress() local 465 bool PPCFastISel::PPCEmitLoad(MVT VT, unsigned &ResultReg, Address &Addr, in PPCEmitLoad() 626 unsigned ResultReg = 0; in SelectLoad() local 1048 unsigned ResultReg = 0; in PPCMoveToFPReg() local 1173 unsigned ResultReg = 0; in PPCMoveToIntReg() local 1290 unsigned ResultReg = createResultReg(RC ? RC : &PPC::G8RCRegClass); in SelectBinaryIntOp() local 1508 unsigned ResultReg = 0; in finishCall() local 1887 unsigned ResultReg = createResultReg(&PPC::GPRCRegClass); in SelectTrunc() local 1928 unsigned ResultReg = createResultReg(RC); in SelectIntExt() local 2112 unsigned ResultReg = createResultReg(RC); in PPCMaterialize32BitInt() local [all …]
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/external/llvm/include/llvm/CodeGen/ |
D | FastISel.h | 80 unsigned ResultReg; member
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/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/ |
D | FastISel.h | 92 unsigned ResultReg = 0; member
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/external/llvm/lib/Target/AMDGPU/ |
D | SIInstrInfo.cpp | 2682 unsigned ResultReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass); in lowerScalarAbs() local 2833 unsigned ResultReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass); in splitScalar64BitBCNT() local 2878 unsigned ResultReg = MRI.createVirtualRegister(&AMDGPU::VReg_64RegClass); in splitScalar64BitBFE() local 2902 unsigned ResultReg = MRI.createVirtualRegister(&AMDGPU::VReg_64RegClass); in splitScalar64BitBFE() local
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
D | SIInstrInfo.cpp | 4093 unsigned ResultReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass); in moveScalarAddSub() local 4126 unsigned ResultReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass); in lowerScalarAbs() local 4379 unsigned ResultReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass); in splitScalar64BitBCNT() local 4420 unsigned ResultReg = MRI.createVirtualRegister(&AMDGPU::VReg_64RegClass); in splitScalar64BitBFE() local 4444 unsigned ResultReg = MRI.createVirtualRegister(&AMDGPU::VReg_64RegClass); in splitScalar64BitBFE() local 4482 unsigned ResultReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass); in movePackToVALU() local
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D | SIRegisterInfo.cpp | 1079 unsigned ResultReg = IsCopy ? in eliminateFrameIndex() local
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