| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/ |
| D | fpoffset_overflow.mir | 36 KILL $r0
37 KILL $r1
38 KILL $r2
39 KILL $r3
40 KILL $r4
41 KILL $r5
42 KILL $r6
43 KILL $r7
44 KILL $r8
45 KILL $r9
[all …]
|
| D | pei-swiftself.mir | 45 KILL $r10
47 KILL $r0
48 KILL $r1
49 KILL $r2
50 KILL $r3
51 KILL $r4
52 KILL $r5
53 KILL $r6
54 KILL $r7
55 KILL $r8
[all …]
|
| D | scavenging.mir | 59 KILL $r0
60 KILL $r1
61 KILL $r2
62 KILL $r3
63 KILL $r4
64 KILL $r5
65 KILL $r6
66 KILL $r7
|
| D | virtregrewriter-subregliveness.mir | 27 ; That copy is being coalesced so we should use a KILL
32 ; CHECK: $r0 = KILL $r0, implicit killed $r0_r1, implicit-def $r0_r1
33 ; CHECK-NEXT: $r1 = KILL $r1, implicit killed $r0_r1
55 ; CHECK: $r0 = KILL $r0, implicit-def $r0_r1
78 ; CHECK: $r0 = KILL $r0, implicit-def $r1, implicit-def $r0_r1
|
| /external/openssh/ |
| D | opensshd.init.in | 9 KILL=@KILL@
50 ${KILL} ${PID}
|
| /external/llvm/lib/CodeGen/ |
| D | ExpandPostRAPseudos.cpp | 103 MI->setDesc(TII->get(TargetOpcode::KILL)); in LowerSubregToReg()
114 MI->setDesc(TII->get(TargetOpcode::KILL)); in LowerSubregToReg()
141 MI->setDesc(TII->get(TargetOpcode::KILL)); in LowerCopy()
156 MI->setDesc(TII->get(TargetOpcode::KILL)); in LowerCopy()
|
| D | PatchableFunction.cpp | 47 case TargetOpcode::KILL: in doesNotGeneratecode()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
| D | ExpandPostRAPseudos.cpp | 99 MI->setDesc(TII->get(TargetOpcode::KILL)); in LowerSubregToReg()
110 MI->setDesc(TII->get(TargetOpcode::KILL)); in LowerSubregToReg()
137 MI->setDesc(TII->get(TargetOpcode::KILL)); in LowerCopy()
154 MI->setDesc(TII->get(TargetOpcode::KILL)); in LowerCopy()
|
| D | PatchableFunction.cpp | 47 case TargetOpcode::KILL: in doesNotGeneratecode()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/GlobalISel/ |
| D | select-shl-scalar.mir | 97 ; ALL: $cl = KILL killed $rcx
131 ; ALL: $cl = KILL killed $rcx
165 ; ALL: $cl = KILL killed $rcx
199 ; ALL: $cl = KILL killed $ecx
233 ; ALL: $cl = KILL killed $ecx
267 ; ALL: $cl = KILL killed $ecx
305 ; ALL: $cl = KILL killed $cx
343 ; ALL: $cl = KILL killed $cx
380 ; ALL: $cl = KILL killed $cx
|
| D | select-lshr-scalar.mir | 96 ; ALL: $cl = KILL killed $rcx
130 ; ALL: $cl = KILL killed $rcx
164 ; ALL: $cl = KILL killed $rcx
198 ; ALL: $cl = KILL killed $ecx
232 ; ALL: $cl = KILL killed $ecx
266 ; ALL: $cl = KILL killed $ecx
304 ; ALL: $cl = KILL killed $cx
342 ; ALL: $cl = KILL killed $cx
379 ; ALL: $cl = KILL killed $cx
|
| D | select-ashr-scalar.mir | 96 ; ALL: $cl = KILL killed $rcx
130 ; ALL: $cl = KILL killed $rcx
164 ; ALL: $cl = KILL killed $rcx
198 ; ALL: $cl = KILL killed $ecx
232 ; ALL: $cl = KILL killed $ecx
266 ; ALL: $cl = KILL killed $ecx
304 ; ALL: $cl = KILL killed $cx
342 ; ALL: $cl = KILL killed $cx
379 ; ALL: $cl = KILL killed $cx
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Mips/ |
| D | delay-slot-kill.ll | 3 ; Currently, the following IR assembly generates a KILL instruction between
5 ; delay slot filler ignores such KILL instructions by filling the slot of the
|
| /external/llvm/test/CodeGen/Mips/ |
| D | delay-slot-kill.ll | 5 ; Currently, the following IR assembly generates a KILL instruction between
7 ; delay slot filler ignores such KILL instructions by filling the slot of the
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/ |
| D | llvm.amdgcn.wqm.vote.ll | 37 ;CHECK: v_cndmask_b32_e64 [[KILL:[^,]+]], -1.0, 1.0, [[WQM]]
38 ;CHECK: v_cmpx_le_f32_e32 {{[^,]+}}, 0, [[KILL]]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/ |
| D | machine-outliner.mir | 103 # It also makes sure that KILL instructions don't impact outlining.
110 # CHECK-NOT: $w17 = KILL renamable $w17, implicit killed $w17
123 $w17 = KILL renamable $w17, implicit killed $w17
|
| /external/swiftshader/third_party/LLVM/include/llvm/Target/ |
| D | TargetOpcodes.h | 35 KILL = 5, enumerator
|
| /external/ltp/testcases/kernel/tracing/ftrace_test/ftrace_stress/ |
| D | ftrace_trace_pipe.sh | 18 kill -KILL $this_pid
|
| /external/compiler-rt/test/asan/TestCases/Android/ |
| D | coverage-android.cc | 115 #ifdef KILL in bar()
|
| /external/swiftshader/third_party/LLVM/lib/CodeGen/ |
| D | ExpandPostRAPseudos.cpp | 128 MI->setDesc(TII->get(TargetOpcode::KILL)); in LowerSubregToReg()
163 MI->setDesc(TII->get(TargetOpcode::KILL)); in LowerCopy()
|
| /external/autotest/client/site_tests/platform_DaemonsRespawn/ |
| D | test_respawn.sh | 66 kill -KILL $PID
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/SystemZ/ |
| D | lower-copy-undef-src.mir | 8 # CHECK: $r13d = KILL undef $r0d, implicit killed $r12q, implicit-def $r12q
|
| /external/llvm/lib/Target/AMDGPU/ |
| D | R600EmitClauseMarkers.cpp | 48 case AMDGPU::KILL: in OccupiedDwords()
94 case AMDGPU::KILL: in IsTrivialInst()
|
| /external/ltp/testcases/kernel/tracing/ftrace_test/ |
| D | ftrace_stress_test.sh | 72 kill -KILL $kill_pid
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | R600EmitClauseMarkers.cpp | 60 case R600::KILL: in OccupiedDwords()
106 case R600::KILL: in IsTrivialInst()
|