| /external/u-boot/arch/arm/dts/ |
| D | imx6ull.dtsi | 70 clocks = <&clks IMX6UL_CLK_ARM>,
71 <&clks IMX6UL_CLK_PLL2_BUS>,
72 <&clks IMX6UL_CLK_PLL2_PFD2>,
73 <&clks IMX6UL_CA7_SECONDARY_SEL>,
74 <&clks IMX6UL_CLK_STEP>,
75 <&clks IMX6UL_CLK_PLL1_SW>,
76 <&clks IMX6UL_CLK_PLL1_SYS>,
77 <&clks IMX6UL_PLL1_BYPASS>,
78 <&clks IMX6UL_CLK_PLL1>,
79 <&clks IMX6UL_PLL1_BYPASS_SRC>,
[all …]
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| D | imx6sx.dtsi | 76 clocks = <&clks IMX6SX_CLK_ARM>,
77 <&clks IMX6SX_CLK_PLL2_PFD2>,
78 <&clks IMX6SX_CLK_STEP>,
79 <&clks IMX6SX_CLK_PLL1_SW>,
80 <&clks IMX6SX_CLK_PLL1_SYS>;
149 clocks = <&clks IMX6SX_CLK_OCRAM>;
166 clocks = <&clks IMX6SX_CLK_GPU>,
167 <&clks IMX6SX_CLK_GPU>,
168 <&clks IMX6SX_CLK_GPU>;
182 clocks = <&clks IMX6SX_CLK_APBH_DMA>;
[all …]
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| D | imx6sll.dtsi | 67 clocks = <&clks IMX6SLL_CLK_ARM>,
68 <&clks IMX6SLL_CLK_PLL2_PFD2>,
69 <&clks IMX6SLL_CLK_STEP>,
70 <&clks IMX6SLL_CLK_PLL1_SW>,
71 <&clks IMX6SLL_CLK_PLL1_SYS>,
72 <&clks IMX6SLL_CLK_PLL1>,
73 <&clks IMX6SLL_PLL1_BYPASS>,
74 <&clks IMX6SLL_PLL1_BYPASS_SRC>;
136 clocks = <&clks IMX6SLL_CLK_PLL2_PFD2>, <&clks IMX6SLL_CLK_PLL2_198M>,
137 <&clks IMX6SLL_CLK_PLL2_BUS>, <&clks IMX6SLL_CLK_ARM>,
[all …]
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| D | imx6qdl.dtsi | 91 clocks = <&clks IMX6QDL_CLK_APBH_DMA>;
102 clocks = <&clks IMX6QDL_CLK_GPMI_IO>,
103 <&clks IMX6QDL_CLK_GPMI_APB>,
104 <&clks IMX6QDL_CLK_GPMI_BCH>,
105 <&clks IMX6QDL_CLK_GPMI_BCH_APB>,
106 <&clks IMX6QDL_CLK_PER1_BCH>;
120 clocks = <&clks IMX6QDL_CLK_HDMI_IAHB>,
121 <&clks IMX6QDL_CLK_HDMI_ISFR>;
146 clocks = <&clks IMX6QDL_CLK_GPU3D_AXI>,
147 <&clks IMX6QDL_CLK_GPU3D_CORE>,
[all …]
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| D | imx6ul.dtsi | 73 clocks = <&clks IMX6UL_CLK_ARM>,
74 <&clks IMX6UL_CLK_PLL2_BUS>,
75 <&clks IMX6UL_CLK_PLL2_PFD2>,
76 <&clks IMX6UL_CA7_SECONDARY_SEL>,
77 <&clks IMX6UL_CLK_STEP>,
78 <&clks IMX6UL_CLK_PLL1_SW>,
79 <&clks IMX6UL_CLK_PLL1_SYS>,
80 <&clks IMX6UL_PLL1_BYPASS>,
81 <&clks IMX6UL_CLK_PLL1>,
82 <&clks IMX6UL_PLL1_BYPASS_SRC>,
[all …]
|
| D | imx7ulp.dtsi | 159 clocks = <&clks IMX7ULP_CLK_DMA1>, <&clks IMX7ULP_CLK_DMA_MUX1>;
193 clocks = <&clks IMX7ULP_CLK_SNVS>;
201 clocks = <&clks IMX7ULP_CLK_LPTPM5>;
209 clocks = <&clks IMX7ULP_CLK_LPIT1>;
211 assigned-clocks = <&clks IMX7ULP_CLK_LPIT1>;
212 assigned-clock-parents = <&clks IMX7ULP_CLK_FIRC>;
219 clocks = <&clks IMX7ULP_CLK_LPI2C4>;
221 assigned-clocks = <&clks IMX7ULP_CLK_LPI2C4>;
222 assigned-clock-parents = <&clks IMX7ULP_CLK_FIRC>;
231 clocks = <&clks IMX7ULP_CLK_LPI2C5>;
[all …]
|
| D | imx6sl.dtsi | 68 clocks = <&clks IMX6SL_CLK_ARM>, <&clks IMX6SL_CLK_PLL2_PFD2>,
69 <&clks IMX6SL_CLK_STEP>, <&clks IMX6SL_CLK_PLL1_SW>,
70 <&clks IMX6SL_CLK_PLL1_SYS>;
115 clocks = <&clks IMX6SL_CLK_OCRAM>;
155 clocks = <&clks IMX6SL_CLK_SPDIF_GCLK>, <&clks IMX6SL_CLK_OSC>,
156 <&clks IMX6SL_CLK_SPDIF>, <&clks IMX6SL_CLK_DUMMY>,
157 <&clks IMX6SL_CLK_DUMMY>, <&clks IMX6SL_CLK_DUMMY>,
158 <&clks IMX6SL_CLK_IPG>, <&clks IMX6SL_CLK_DUMMY>,
159 <&clks IMX6SL_CLK_DUMMY>, <&clks IMX6SL_CLK_SPBA>;
174 clocks = <&clks IMX6SL_CLK_ECSPI1>,
[all …]
|
| D | imx7s.dtsi | 101 clocks = <&clks IMX7D_CLK_ARM>;
121 clocks = <&clks IMX7D_USB_PHY1_CLK>;
128 clocks = <&clks IMX7D_USB_HSIC_ROOT_CLK>;
195 clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
227 clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
240 clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
277 clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
304 clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
318 clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
436 clocks = <&clks IMX7D_WDOG1_ROOT_CLK>;
[all …]
|
| D | imx6q.dtsi | 47 clocks = <&clks IMX6QDL_CLK_ARM>,
48 <&clks IMX6QDL_CLK_PLL2_PFD2_396M>,
49 <&clks IMX6QDL_CLK_STEP>,
50 <&clks IMX6QDL_CLK_PLL1_SW>,
51 <&clks IMX6QDL_CLK_PLL1_SYS>;
85 clocks = <&clks IMX6QDL_CLK_OCRAM>;
96 clocks = <&clks IMX6Q_CLK_ECSPI5>,
97 <&clks IMX6Q_CLK_ECSPI5>;
114 clocks = <&clks IMX6QDL_CLK_SATA>,
115 <&clks IMX6QDL_CLK_SATA_REF_100M>,
[all …]
|
| D | imx6dl.dtsi | 42 clocks = <&clks IMX6QDL_CLK_ARM>,
43 <&clks IMX6QDL_CLK_PLL2_PFD2_396M>,
44 <&clks IMX6QDL_CLK_STEP>,
45 <&clks IMX6QDL_CLK_PLL1_SW>,
46 <&clks IMX6QDL_CLK_PLL1_SYS>;
66 clocks = <&clks IMX6QDL_CLK_OCRAM>;
97 clocks = <&clks IMX6DL_CLK_I2C4>;
123 clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>, <&clks IMX6QDL_CLK_LDB_DI1_SEL>,
124 <&clks IMX6QDL_CLK_IPU1_DI0_SEL>, <&clks IMX6QDL_CLK_IPU1_DI1_SEL>,
125 <&clks IMX6QDL_CLK_LDB_DI0>, <&clks IMX6QDL_CLK_LDB_DI1>;
|
| D | imx53.dtsi | 71 clocks = <&clks IMX5_CLK_UART2_IPG_GATE>,
72 <&clks IMX5_CLK_UART2_PER_GATE>;
79 clks: ccm@53fd4000{ label
162 clocks = <&clks IMX5_CLK_I2C3_GATE>;
178 clocks = <&clks IMX5_CLK_SDMA_GATE>,
179 <&clks IMX5_CLK_SDMA_GATE>;
189 clocks = <&clks IMX5_CLK_FEC_GATE>,
190 <&clks IMX5_CLK_FEC_GATE>,
191 <&clks IMX5_CLK_FEC_GATE>;
202 clocks = <&clks IMX5_CLK_I2C2_GATE>;
[all …]
|
| D | imx7d.dtsi | 77 clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
94 clocks = <&clks IMX7D_USB_CTRL_CLK>;
109 clocks = <&clks IMX7D_USB_PHY2_CLK>;
119 clocks = <&clks IMX7D_ENET_AXI_ROOT_CLK>,
120 <&clks IMX7D_ENET_AXI_ROOT_CLK>,
121 <&clks IMX7D_ENET2_TIME_ROOT_CLK>,
122 <&clks IMX7D_PLL_ENET_MAIN_125M_CLK>,
123 <&clks IMX7D_ENET_PHY_REF_ROOT_CLK>;
|
| D | imx6qdl-logicpd.dtsi | 40 &clks {
41 assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
42 <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
43 assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
44 <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
|
| D | imx6qdl-icore.dtsi | 77 &clks {
78 assigned-clocks = <&clks IMX6QDL_CLK_LVDS2_SEL>;
79 assigned-clock-parents = <&clks IMX6QDL_CLK_OSC>;
|
| D | imx6q-cm-fx6.dts | 357 assigned-clocks = <&clks IMX6QDL_CLK_SSI2_SEL>,
358 <&clks IMX6QDL_CLK_PLL4_AUDIO_DIV>;
359 assigned-clock-parents = <&clks IMX6QDL_CLK_PLL4_AUDIO_DIV>;
|
| D | imx6sll-evk.dts | 153 &clks {
154 assigned-clocks = <&clks IMX6SLL_CLK_PLL4_AUDIO_DIV>;
349 clocks = <&clks IMX6SLL_CLK_EXTERN_AUDIO>;
|
| /external/ltp/testcases/kernel/syscalls/timerfd/ |
| D | timerfd01.c | 141 struct tmr_type clks[] = { in main() local
154 for (i = 0; i < sizeof(clks) / sizeof(clks[0]); i++) { in main()
157 fprintf(stdout, "| testing %s\n", clks[i].name); in main()
163 tnow = getustime(clks[i].id); in main()
164 if ((tfd = timerfd_create(clks[i].id, 0)) == -1) { in main()
177 ttmr = getustime(clks[i].id); in main()
185 tnow = getustime(clks[i].id); in main()
195 ttmr = getustime(clks[i].id); in main()
203 tnow = getustime(clks[i].id); in main()
227 ttmr = getustime(clks[i].id); in main()
[all …]
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| /external/u-boot/drivers/clk/mvebu/ |
| D | armada-37xx-periph.c | 54 const struct clk_periph *clks; member
236 const struct clk_periph *clk = &priv->clks[id]; in get_parent_rate()
282 const struct clk_periph *clk = &priv->clks[id]; in periph_clk_get_rate()
314 const struct clk_periph *periph_clk = &priv->clks[clk->id]; in periph_clk_enable()
344 const struct clk_periph *clks; in armada_37xx_periph_clk_dump() local
350 clks = priv->clks; in armada_37xx_periph_clk_dump()
353 printf(" %s at %lu Hz\n", clks[i].name, in armada_37xx_periph_clk_dump()
396 const struct clk_periph *clks; in armada_37xx_periph_clk_probe() local
399 clks = (const struct clk_periph *)dev_get_driver_data(dev); in armada_37xx_periph_clk_probe()
400 if (!clks) in armada_37xx_periph_clk_probe()
[all …]
|
| /external/u-boot/drivers/clk/ |
| D | clk_sandbox_test.c | 12 struct clk clks[SANDBOX_CLK_TEST_ID_COUNT]; member
29 &sbct->clks[i]); in sandbox_clk_test_get()
51 return clk_get_rate(&sbct->clks[id]); in sandbox_clk_test_get_rate()
61 return clk_set_rate(&sbct->clks[id], rate); in sandbox_clk_test_set_rate()
71 return clk_enable(&sbct->clks[id]); in sandbox_clk_test_enable()
88 return clk_disable(&sbct->clks[id]); in sandbox_clk_test_disable()
104 ret = clk_free(&sbct->clks[i]); in sandbox_clk_test_free()
|
| D | clk-uclass.c | 116 bulk->clks = devm_kcalloc(dev, count, sizeof(struct clk), GFP_KERNEL); in clk_get_bulk()
117 if (!bulk->clks) in clk_get_bulk()
121 ret = clk_get_by_index(dev, i, &bulk->clks[i]); in clk_get_bulk()
131 err = clk_release_all(bulk->clks, bulk->count); in clk_get_bulk()
376 ret = clk_enable(&bulk->clks[i]); in clk_enable_bulk()
401 ret = clk_disable(&bulk->clks[i]); in clk_disable_bulk()
|
| /external/u-boot/drivers/ddr/fsl/ |
| D | util.c | 87 unsigned long long clks, clks_rem; in picos_to_mclk() local
95 clks = picos * (unsigned long long)data_rate; in picos_to_mclk()
100 clks_rem = do_div(clks, UL_5POW12); in picos_to_mclk()
101 clks_rem += (clks & (UL_2POW13-1)) * UL_5POW12; in picos_to_mclk()
102 clks >>= 13; in picos_to_mclk()
106 clks++; in picos_to_mclk()
109 if (clks > ULL_8FS) in picos_to_mclk()
110 clks = ULL_8FS; in picos_to_mclk()
111 return (unsigned int) clks; in picos_to_mclk()
|
| /external/u-boot/drivers/usb/host/ |
| D | dwc3-of-simple.c | 20 struct clk_bulk clks; member
49 ret = clk_get_bulk(dev, &simple->clks); in dwc3_of_simple_clk_init()
56 ret = clk_enable_bulk(&simple->clks); in dwc3_of_simple_clk_init()
58 clk_release_bulk(&simple->clks); in dwc3_of_simple_clk_init()
88 clk_release_bulk(&simple->clks); in dwc3_of_simple_remove()
|
| /external/u-boot/arch/arm/mach-rockchip/ |
| D | rk3288-board.c | 259 } clks[] = { in do_clock() local
280 for (i = 0; i < ARRAY_SIZE(clks); i++) { in do_clock()
284 clk.id = clks[i].id; in do_clock()
290 printf("%s: %lu\n", clks[i].name, rate); in do_clock()
|
| /external/u-boot/include/ |
| D | clk.h | 75 struct clk *clks; member
201 return clk_release_all(bulk->clks, bulk->count); in clk_release_bulk()
|
| /external/u-boot/arch/powerpc/cpu/mpc83xx/ |
| D | spd_sdram.c | 77 int clks; in picos_to_clk() local
80 clks = picos / (1000000000 / (mem_bus_clk / 1000)); in picos_to_clk()
82 clks++; in picos_to_clk()
84 return clks; in picos_to_clk()
|