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Searched refs:uart (Results 1 – 25 of 170) sorted by relevance

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/external/u-boot/drivers/serial/
Dmcfuart.c27 static int mcf_serial_init_common(uart_t *uart, int port_idx, int baudrate) in mcf_serial_init_common() argument
34 writeb(UART_UCR_RESET_RX, &uart->ucr); in mcf_serial_init_common()
35 writeb(UART_UCR_RESET_TX, &uart->ucr); in mcf_serial_init_common()
36 writeb(UART_UCR_RESET_ERROR, &uart->ucr); in mcf_serial_init_common()
37 writeb(UART_UCR_RESET_MR, &uart->ucr); in mcf_serial_init_common()
40 writeb(0, &uart->uimr); in mcf_serial_init_common()
43 writeb(UART_UCSR_RCS_SYS_CLK | UART_UCSR_TCS_SYS_CLK, &uart->ucsr); in mcf_serial_init_common()
45 writeb(UART_UMR_BC_8 | UART_UMR_PM_NONE, &uart->umr); in mcf_serial_init_common()
46 writeb(UART_UMR_SB_STOP_BITS_1, &uart->umr); in mcf_serial_init_common()
53 writeb((u8)((counter & 0xff00) >> 8), &uart->ubg1); in mcf_serial_init_common()
[all …]
Dserial_s5p.c62 static void __maybe_unused s5p_serial_init(struct s5p_uart *uart) in s5p_serial_init() argument
65 writel(0x3, &uart->ufcon); in s5p_serial_init()
66 writel(0, &uart->umcon); in s5p_serial_init()
68 writel(0x3, &uart->ulcon); in s5p_serial_init()
70 writel(0x245, &uart->ucon); in s5p_serial_init()
73 static void __maybe_unused s5p_serial_baud(struct s5p_uart *uart, uint uclk, in s5p_serial_baud() argument
80 writel(val / 16 - 1, &uart->ubrdiv); in s5p_serial_baud()
83 writew(udivslot[val % 16], &uart->rest.slot); in s5p_serial_baud()
85 writeb(val % 16, &uart->rest.value); in s5p_serial_baud()
92 struct s5p_uart *const uart = plat->reg; in s5p_serial_setbrg() local
[all …]
Dserial_meson.c44 static void meson_serial_init(struct meson_uart *uart) in meson_serial_init() argument
48 val = readl(&uart->control); in meson_serial_init()
50 writel(val, &uart->control); in meson_serial_init()
52 writel(val, &uart->control); in meson_serial_init()
54 writel(val, &uart->control); in meson_serial_init()
60 struct meson_uart *const uart = plat->reg; in meson_serial_probe() local
62 meson_serial_init(uart); in meson_serial_probe()
70 struct meson_uart *const uart = plat->reg; in meson_serial_getc() local
72 if (readl(&uart->status) & AML_UART_RX_EMPTY) in meson_serial_getc()
75 return readl(&uart->rfifo) & 0xff; in meson_serial_getc()
[all …]
Dserial_sti_asc.c70 struct sti_asc_uart *const uart = priv->regs; in sti_asc_pending() local
73 status = readl(&uart->status); in sti_asc_pending()
80 static int _sti_asc_serial_setbrg(struct sti_asc_uart *uart, int baudrate) in _sti_asc_serial_setbrg() argument
108 val = readl(&uart->control); in _sti_asc_serial_setbrg()
109 writel(val & ~RUN, &uart->control); in _sti_asc_serial_setbrg()
112 writel(t, &uart->baudrate); in _sti_asc_serial_setbrg()
114 writel(1, &uart->txreset); in _sti_asc_serial_setbrg()
115 writel(1, &uart->rxreset); in _sti_asc_serial_setbrg()
122 writel(val, &uart->control); in _sti_asc_serial_setbrg()
131 struct sti_asc_uart *const uart = priv->regs; in sti_asc_serial_setbrg() local
[all …]
Dserial_pxa.c177 #define pxa_uart(uart, UART) \ argument
178 int uart##_init(void) \
183 void uart##_setbrg(void) \
188 void uart##_putc(const char c) \
193 void uart##_puts(const char *s) \
198 int uart##_getc(void) \
203 int uart##_tstc(void) \
208 #define pxa_uart_desc(uart) \ argument
209 struct serial_device serial_##uart##_device = \
211 .name = "serial_"#uart, \
[all …]
Dserial_mxc.c282 struct mxc_uart *const uart = plat->reg; in mxc_serial_getc() local
284 if (readl(&uart->ts) & UTS_RXEMPTY) in mxc_serial_getc()
287 return readl(&uart->rxd) & URXD_RX_DATA; in mxc_serial_getc()
293 struct mxc_uart *const uart = plat->reg; in mxc_serial_putc() local
295 if (!(readl(&uart->ts) & UTS_TXEMPTY)) in mxc_serial_putc()
298 writel(ch, &uart->txd); in mxc_serial_putc()
306 struct mxc_uart *const uart = plat->reg; in mxc_serial_pending() local
307 uint32_t sr2 = readl(&uart->sr2); in mxc_serial_pending()
/external/u-boot/board/astro/mcf5373l/
Dmcf5373l.c90 uart_t *uart; in rs_serial_init() local
95 uart = (uart_t *)(MMAP_UART0); in rs_serial_init()
98 uart = (uart_t *)(MMAP_UART1); in rs_serial_init()
101 uart = (uart_t *)(MMAP_UART2); in rs_serial_init()
104 uart = (uart_t *)(MMAP_UART0); in rs_serial_init()
110 writeb(UART_UCR_RESET_RX, &uart->ucr); in rs_serial_init()
111 writeb(UART_UCR_RESET_TX, &uart->ucr); in rs_serial_init()
112 writeb(UART_UCR_RESET_ERROR, &uart->ucr); in rs_serial_init()
113 writeb(UART_UCR_RESET_MR, &uart->ucr); in rs_serial_init()
116 writeb(0, &uart->uimr); in rs_serial_init()
[all …]
/external/u-boot/arch/arm/mach-uniphier/debug-uart/
DMakefile4 obj-$(CONFIG_ARCH_UNIPHIER_LD4) += debug-uart-ld4.o
5 obj-$(CONFIG_ARCH_UNIPHIER_PRO4) += debug-uart-pro4.o
6 obj-$(CONFIG_ARCH_UNIPHIER_SLD8) += debug-uart-sld8.o
7 obj-$(CONFIG_ARCH_UNIPHIER_PRO5) += debug-uart-pro5.o
8 obj-$(CONFIG_ARCH_UNIPHIER_PXS2) += debug-uart-pxs2.o
9 obj-$(CONFIG_ARCH_UNIPHIER_LD6B) += debug-uart-ld6b.o
10 obj-$(CONFIG_ARCH_UNIPHIER_LD11) += debug-uart-ld20.o
11 obj-$(CONFIG_ARCH_UNIPHIER_LD20) += debug-uart-ld20.o
14 obj-y += debug-uart.o
/external/u-boot/doc/device-tree-bindings/serial/
Domap_serial.txt4 - compatible : should be "ti,omap2-uart" for OMAP2 controllers
5 - compatible : should be "ti,omap3-uart" for OMAP3 controllers
6 - compatible : should be "ti,omap4-uart" for OMAP4 controllers
7 - compatible : should be "ti,am4372-uart" for AM437x controllers
8 - compatible : should be "ti,am3352-uart" for AM335x controllers
9 - compatible : should be "ti,dra742-uart" for DRA7x controllers
11 - interrupts or interrupts-extended : Should contain the uart interrupt
15 - ti,hwmods : Must be "uart<n>", n being the instance number (1-based)
26 compatible = "ti,omap3-uart";
Dsnps-dw-apb-uart.txt4 - compatible : "snps,dw-apb-uart"
6 - interrupts : should contain uart interrupt.
18 - snps,uart-16550-compatible : reflects the value of UART_16550_COMPATIBLE
42 uart@80230000 {
43 compatible = "snps,dw-apb-uart";
57 uart@80230000 {
58 compatible = "snps,dw-apb-uart";
68 uart@80230000 {
69 compatible = "snps,dw-apb-uart";
D8250.txt11 - For Tegra20, must contain "nvidia,tegra20-uart"
12 - For other Tegra, must contain '"nvidia,<chip>-uart",
13 "nvidia,tegra20-uart"' where <chip> is tegra30, tegra114, tegra124,
15 - "nxp,lpc3220-uart"
16 - "ralink,rt2880-uart"
25 - interrupts : should contain uart interrupt.
60 uart@80230000 {
Dqca,ar9330-uart.txt5 - compatible: Must be "qca,ar9330-uart"
21 uart0: uart@18020000 {
22 compatible = "qca,ar9330-uart";
/external/u-boot/board/freescale/ls1046aqds/
Dls1046aqds.c175 u8 uart; in board_early_init_f() local
197 uart = QIXIS_READ(brdcfg[14]); in board_early_init_f()
198 uart &= ~CFG_UART_MUX_MASK; in board_early_init_f()
199 uart |= CFG_LPUART_EN << CFG_UART_MUX_SHIFT; in board_early_init_f()
200 QIXIS_WRITE(brdcfg[14], uart); in board_early_init_f()
/external/u-boot/arch/arm/dts/
Dexynos4.dtsi39 compatible = "samsung,exynos4210-uart";
45 compatible = "samsung,exynos4210-uart";
51 compatible = "samsung,exynos4210-uart";
57 compatible = "samsung,exynos4210-uart";
63 compatible = "samsung,exynos4210-uart";
Dimx6ull.dtsi305 compatible = "fsl,imx6ul-uart",
306 "fsl,imx6q-uart", "fsl,imx21-uart";
318 compatible = "fsl,imx6ul-uart",
319 "fsl,imx6q-uart", "fsl,imx21-uart";
1038 compatible = "fsl,imx6ul-uart",
1039 "fsl,imx6q-uart", "fsl,imx21-uart";
1051 compatible = "fsl,imx6ul-uart",
1052 "fsl,imx6q-uart", "fsl,imx21-uart";
1064 compatible = "fsl,imx6ul-uart",
1065 "fsl,imx6q-uart", "fsl,imx21-uart";
[all …]
Dhi6220.dtsi165 uart0: uart@f8015000 { /* console */
175 uart1: uart@f7111000 {
186 uart2: uart@f7112000 {
197 uart3: uart@f7113000 {
207 uart4: uart@f7114000 {
Dimx6sll.dtsi266 compatible = "fsl,imx6sll-uart", "fsl,imx6q-uart", "fsl,imx21-uart";
278 compatible = "fsl,imx6sll-uart", "fsl,imx6q-uart", "fsl,imx21-uart";
290 compatible = "fsl,imx6sll-uart", "fsl,imx6q-uart", "fsl,imx21-uart";
341 compatible = "fsl,imx6sll-uart", "fsl,imx6q-uart", "fsl,imx21-uart";
847 compatible = "fsl,imx6sll-uart", "fsl,imx6q-uart", "fsl,imx21-uart";
Dimx6sl.dtsi217 compatible = "fsl,imx6sl-uart",
218 "fsl,imx6q-uart", "fsl,imx21-uart";
230 compatible = "fsl,imx6sl-uart",
231 "fsl,imx6q-uart", "fsl,imx21-uart";
243 compatible = "fsl,imx6sl-uart",
244 "fsl,imx6q-uart", "fsl,imx21-uart";
304 compatible = "fsl,imx6sl-uart",
305 "fsl,imx6q-uart", "fsl,imx21-uart";
317 compatible = "fsl,imx6sl-uart",
318 "fsl,imx6q-uart", "fsl,imx21-uart";
Ddm816x.dtsi375 uart1: uart@48020000 {
376 compatible = "ti,am3352-uart", "ti,omap3-uart";
385 uart2: uart@48022000 {
386 compatible = "ti,am3352-uart", "ti,omap3-uart";
395 uart3: uart@48024000 {
396 compatible = "ti,am3352-uart", "ti,omap3-uart";
Dimx6ul.dtsi246 compatible = "fsl,imx6ul-uart",
247 "fsl,imx6q-uart";
257 compatible = "fsl,imx6ul-uart",
258 "fsl,imx6q-uart";
268 compatible = "fsl,imx6ul-uart",
269 "fsl,imx6q-uart";
888 compatible = "fsl,imx6ul-uart",
889 "fsl,imx6q-uart";
899 compatible = "fsl,imx6ul-uart",
900 "fsl,imx6q-uart";
[all …]
Dexynos5.dtsi199 compatible = "samsung,exynos4210-uart";
206 compatible = "samsung,exynos4210-uart";
213 compatible = "samsung,exynos4210-uart";
220 compatible = "samsung,exynos4210-uart";
Drk3188.dtsi579 compatible = "rockchip,rk3188-uart", "snps,dw-apb-uart";
585 compatible = "rockchip,rk3188-uart", "snps,dw-apb-uart";
591 compatible = "rockchip,rk3188-uart", "snps,dw-apb-uart";
597 compatible = "rockchip,rk3188-uart", "snps,dw-apb-uart";
Dtegra30.dtsi373 * is "nvidia,tegra30-uart", "nvidia,tegra20-uart" and to enable
378 compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart";
391 compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart";
404 compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart";
417 compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart";
430 compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart";
Drk3036.dtsi111 compatible = "rockchip,rk3036-uart", "snps,dw-apb-uart";
124 compatible = "rockchip,rk3036-uart", "snps,dw-apb-uart";
137 compatible = "rockchip,rk3036-uart", "snps,dw-apb-uart";
/external/u-boot/board/freescale/ls1043aqds/
Dls1043aqds.c236 u8 uart; in board_early_init_f() local
256 uart = QIXIS_READ(brdcfg[14]); in board_early_init_f()
257 uart &= ~CFG_UART_MUX_MASK; in board_early_init_f()
258 uart |= CFG_LPUART_EN << CFG_UART_MUX_SHIFT; in board_early_init_f()
259 QIXIS_WRITE(brdcfg[14], uart); in board_early_init_f()

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