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Searched refs:trcd (Results 1 – 25 of 65) sorted by relevance

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/external/u-boot/arch/arm/mach-sunxi/dram_timings/
Dh6_lpddr3.c31 u8 trcd = max(ns_to_t(24), 2); in mctl_set_timing_params() local
93 writel((trcd << 24) | (tccd << 16) | (trrd << 8) | trp, in mctl_set_timing_params()
118 writel((trc << 17) | (trcd << 9) | (twtr << 1), &mctl_phy->dtpr[5]); in mctl_set_timing_params()
Dh6_ddr3_1333.c52 u8 trcd = ns_to_t(15); /* JEDEC: 13.5 ns */ in mctl_set_timing_params() local
105 writel((trcd << 24) | (tccd << 16) | (trrd << 8) | trp, in mctl_set_timing_params()
130 writel((trc << 17) | (trcd << 9) | (twtr << 1), &mctl_phy->dtpr[5]); in mctl_set_timing_params()
Dlpddr3_stock.c13 u8 trcd = max(ns_to_t(24), 2); in mctl_set_timing_params() local
63 writel(DRAMTMG4_TRCD(trcd) | DRAMTMG4_TCCD(tccd) | DRAMTMG4_TRRD(trrd) | in mctl_set_timing_params()
Dddr3_1333.c13 u8 trcd = ns_to_t(15); in mctl_set_timing_params() local
67 writel(DRAMTMG4_TRCD(trcd) | DRAMTMG4_TCCD(tccd) | DRAMTMG4_TRRD(trrd) | in mctl_set_timing_params()
Dddr2_v3s.c13 u8 trcd = ns_to_t(20); in mctl_set_timing_params() local
64 writel(DRAMTMG4_TRCD(trcd) | DRAMTMG4_TCCD(tccd) | DRAMTMG4_TRRD(trrd) | in mctl_set_timing_params()
/external/u-boot/board/gateworks/gw_ventana/
Dgw_ventana_spl.c158 .trcd = 1375,
172 .trcd = 1375,
186 .trcd = 1375,
200 .trcd = 1375,
/external/u-boot/board/freescale/mx6memcal/
Dspl.c253 .trcd = 1375,
267 .trcd = 1375,
281 .trcd = 1375,
295 .trcd = 1350,
/external/u-boot/arch/arm/mach-imx/mx6/
Dopos6ul.c144 .trcd = 1500,
185 mem_ddr.trcd = 1375; in spl_dram_init()
/external/u-boot/board/compulab/cm_fx6/
Dspl.c115 .trcd = 1800,
184 .trcd = 1324,
/external/u-boot/drivers/ram/
Dstm32_sdram.c126 u8 trcd; member
196 writel(timing->trcd << FMC_SDTR_TRCD_SHIFT in stm32_sdram_init()
206 writel(timing->trcd << FMC_SDTR_TRCD_SHIFT in stm32_sdram_init()
/external/u-boot/board/technexion/pico-imx6/
Dspl.c146 .trcd = 1500,
160 .trcd = 1500,
/external/u-boot/doc/device-tree-bindings/clock/
Drockchip,rk3288-dmc.txt50 rockchip,trcd: tRCD,AC timing parameters from the memory data-sheet
68 trcd
142 rockchip,trcd = <10>;
/external/u-boot/include/
Dspd.h44 unsigned char trcd; /* 29 Min RAS to CAS Delay (tRCD) */ member
Dddr_spd.h44 unsigned char trcd; /* 29 Min RAS to CAS Delay (tRCD) */ member
106 unsigned char trcd; /* 29 Min RAS to CAS Delay (tRCD) */ member
/external/u-boot/arch/arm/mach-sunxi/
Ddram_sun8i_a83t.c95 u8 trcd = ns_to_t(15); in auto_set_timing_para() local
147 trcd = max(ns_to_t(24), 2); in auto_set_timing_para()
178 reg_val = (trcd << 24) | (tccd << 16) | (trrd << 8) | (trp << 0); in auto_set_timing_para()
Ddram_sun8i_a33.c95 u8 trcd = ns_to_t(15); in auto_set_timing_para() local
146 reg_val = (trcd << 24) | (tccd << 16) | (trrd << 8) | (trp << 0); in auto_set_timing_para()
/external/u-boot/board/bachmann/ot1200/
Dot1200_spl.c98 .trcd = 1375,
/external/u-boot/board/ccv/xpress/
Dspl.c74 .trcd = 1375,
/external/u-boot/board/phytec/pfla02/
Dpfla02.c505 .trcd = 1375,
520 .trcd = 1375,
535 .trcd = 1375,
/external/u-boot/board/barco/platinum/
Dspl_picon.c93 .trcd = 1375,
Dspl_titanium.c93 .trcd = 1375,
/external/u-boot/arch/arm/include/asm/arch-rockchip/
Dsdram_rk3288.h52 u32 trcd; member
Dsdram_rk3036.h55 u32 trcd; member
252 u32 trcd; member
/external/u-boot/board/engicam/common/
Dspl.c211 .trcd = 1375,
361 .trcd = 1375,
/external/u-boot/arch/arm/include/asm/arch-omap3/
Dmem.h66 #define ACTIM_CTRLA(trfc, trc, tras, trp, trcd, trrd, tdpl, tdal) \ argument
71 ACTIM_CTRLA_TRCD(trcd) | \

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