| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | ScoreboardHazardRecognizer.cpp | 33 : ScheduleHazardRecognizer(), DebugType(ParentDebugType), ItinData(II), in ScoreboardHazardRecognizer()
40 if (ItinData && !ItinData->isEmpty()) { in ScoreboardHazardRecognizer()
42 if (ItinData->isEndMarker(idx)) in ScoreboardHazardRecognizer()
45 const InstrStage *IS = ItinData->beginStage(idx); in ScoreboardHazardRecognizer()
46 const InstrStage *E = ItinData->endStage(idx); in ScoreboardHazardRecognizer()
74 IssueWidth = ItinData->SchedModel.IssueWidth; in ScoreboardHazardRecognizer()
113 if (!ItinData || ItinData->isEmpty()) in getHazardType()
128 for (const InstrStage *IS = ItinData->beginStage(idx), in getHazardType()
129 *E = ItinData->endStage(idx); IS != E; ++IS) { in getHazardType()
172 if (!ItinData || ItinData->isEmpty()) in EmitInstruction()
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| D | TargetInstrInfo.cpp | 1036 TargetInstrInfo::getOperandLatency(const InstrItineraryData *ItinData, in getOperandLatency() argument
1039 if (!ItinData || ItinData->isEmpty()) in getOperandLatency()
1047 return ItinData->getOperandCycle(DefClass, DefIdx); in getOperandLatency()
1049 return ItinData->getOperandLatency(DefClass, DefIdx, UseClass, UseIdx); in getOperandLatency()
1052 int TargetInstrInfo::getInstrLatency(const InstrItineraryData *ItinData, in getInstrLatency() argument
1054 if (!ItinData || ItinData->isEmpty()) in getInstrLatency()
1060 return ItinData->getStageLatency(get(N->getMachineOpcode()).getSchedClass()); in getInstrLatency()
1067 unsigned TargetInstrInfo::getNumMicroOps(const InstrItineraryData *ItinData, in getNumMicroOps() argument
1069 if (!ItinData || ItinData->isEmpty()) in getNumMicroOps()
1073 int UOps = ItinData->Itineraries[Class].NumMicroOps; in getNumMicroOps()
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| /external/llvm/lib/CodeGen/ |
| D | ScoreboardHazardRecognizer.cpp | 31 : ScheduleHazardRecognizer(), DebugType(ParentDebugType), ItinData(II), in ScoreboardHazardRecognizer()
38 if (ItinData && !ItinData->isEmpty()) { in ScoreboardHazardRecognizer()
40 if (ItinData->isEndMarker(idx)) in ScoreboardHazardRecognizer()
43 const InstrStage *IS = ItinData->beginStage(idx); in ScoreboardHazardRecognizer()
44 const InstrStage *E = ItinData->endStage(idx); in ScoreboardHazardRecognizer()
72 IssueWidth = ItinData->SchedModel.IssueWidth; in ScoreboardHazardRecognizer()
111 if (!ItinData || ItinData->isEmpty()) in getHazardType()
126 for (const InstrStage *IS = ItinData->beginStage(idx), in getHazardType()
127 *E = ItinData->endStage(idx); IS != E; ++IS) { in getHazardType()
171 if (!ItinData || ItinData->isEmpty()) in EmitInstruction()
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| D | TargetInstrInfo.cpp | 981 TargetInstrInfo::getOperandLatency(const InstrItineraryData *ItinData, in getOperandLatency() argument
984 if (!ItinData || ItinData->isEmpty()) in getOperandLatency()
992 return ItinData->getOperandCycle(DefClass, DefIdx); in getOperandLatency()
994 return ItinData->getOperandLatency(DefClass, DefIdx, UseClass, UseIdx); in getOperandLatency()
997 int TargetInstrInfo::getInstrLatency(const InstrItineraryData *ItinData, in getInstrLatency() argument
999 if (!ItinData || ItinData->isEmpty()) in getInstrLatency()
1005 return ItinData->getStageLatency(get(N->getMachineOpcode()).getSchedClass()); in getInstrLatency()
1012 unsigned TargetInstrInfo::getNumMicroOps(const InstrItineraryData *ItinData, in getNumMicroOps() argument
1014 if (!ItinData || ItinData->isEmpty()) in getNumMicroOps()
1018 int UOps = ItinData->Itineraries[Class].NumMicroOps; in getNumMicroOps()
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| /external/llvm-project/llvm/lib/CodeGen/ |
| D | ScoreboardHazardRecognizer.cpp | 33 : ScheduleHazardRecognizer(), DebugType(ParentDebugType), ItinData(II), in ScoreboardHazardRecognizer()
40 if (ItinData && !ItinData->isEmpty()) { in ScoreboardHazardRecognizer()
42 if (ItinData->isEndMarker(idx)) in ScoreboardHazardRecognizer()
45 const InstrStage *IS = ItinData->beginStage(idx); in ScoreboardHazardRecognizer()
46 const InstrStage *E = ItinData->endStage(idx); in ScoreboardHazardRecognizer()
74 IssueWidth = ItinData->SchedModel.IssueWidth; in ScoreboardHazardRecognizer()
114 if (!ItinData || ItinData->isEmpty()) in getHazardType()
129 for (const InstrStage *IS = ItinData->beginStage(idx), in getHazardType()
130 *E = ItinData->endStage(idx); IS != E; ++IS) { in getHazardType()
173 if (!ItinData || ItinData->isEmpty()) in EmitInstruction()
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| D | TargetInstrInfo.cpp | 1092 TargetInstrInfo::getOperandLatency(const InstrItineraryData *ItinData, in getOperandLatency() argument
1095 if (!ItinData || ItinData->isEmpty()) in getOperandLatency()
1103 return ItinData->getOperandCycle(DefClass, DefIdx); in getOperandLatency()
1105 return ItinData->getOperandLatency(DefClass, DefIdx, UseClass, UseIdx); in getOperandLatency()
1108 int TargetInstrInfo::getInstrLatency(const InstrItineraryData *ItinData, in getInstrLatency() argument
1110 if (!ItinData || ItinData->isEmpty()) in getInstrLatency()
1116 return ItinData->getStageLatency(get(N->getMachineOpcode()).getSchedClass()); in getInstrLatency()
1123 unsigned TargetInstrInfo::getNumMicroOps(const InstrItineraryData *ItinData, in getNumMicroOps() argument
1125 if (!ItinData || ItinData->isEmpty()) in getNumMicroOps()
1129 int UOps = ItinData->Itineraries[Class].NumMicroOps; in getNumMicroOps()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMBaseInstrInfo.h | 278 unsigned getNumMicroOps(const InstrItineraryData *ItinData,
281 int getOperandLatency(const InstrItineraryData *ItinData,
285 int getOperandLatency(const InstrItineraryData *ItinData,
306 int getVLDMDefCycle(const InstrItineraryData *ItinData,
310 int getLDMDefCycle(const InstrItineraryData *ItinData,
314 int getVSTMUseCycle(const InstrItineraryData *ItinData,
318 int getSTMUseCycle(const InstrItineraryData *ItinData,
322 int getOperandLatency(const InstrItineraryData *ItinData,
328 int getOperandLatencyImpl(const InstrItineraryData *ItinData,
337 unsigned getInstrLatency(const InstrItineraryData *ItinData,
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| D | ARMHazardRecognizer.h | 35 ARMHazardRecognizer(const InstrItineraryData *ItinData, in ARMHazardRecognizer() argument
37 : ScoreboardHazardRecognizer(ItinData, DAG, "post-RA-sched"), in ARMHazardRecognizer()
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| D | ARMBaseInstrInfo.cpp | 2773 static unsigned getNumMicroOpsSwiftLdSt(const InstrItineraryData *ItinData, in getNumMicroOpsSwiftLdSt() argument
2778 int UOps = ItinData->getNumMicroOps(Desc.getSchedClass()); in getNumMicroOpsSwiftLdSt()
3070 unsigned ARMBaseInstrInfo::getNumMicroOps(const InstrItineraryData *ItinData, in getNumMicroOps() argument
3072 if (!ItinData || ItinData->isEmpty()) in getNumMicroOps()
3077 int ItinUOps = ItinData->getNumMicroOps(Class); in getNumMicroOps()
3080 return getNumMicroOpsSwiftLdSt(ItinData, MI); in getNumMicroOps()
3184 ARMBaseInstrInfo::getVLDMDefCycle(const InstrItineraryData *ItinData, in getVLDMDefCycle() argument
3191 return ItinData->getOperandCycle(DefClass, DefIdx); in getVLDMDefCycle()
3225 ARMBaseInstrInfo::getLDMDefCycle(const InstrItineraryData *ItinData, in getLDMDefCycle() argument
3232 return ItinData->getOperandCycle(DefClass, DefIdx); in getLDMDefCycle()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMBaseInstrInfo.h | 314 unsigned getNumMicroOps(const InstrItineraryData *ItinData,
317 int getOperandLatency(const InstrItineraryData *ItinData,
321 int getOperandLatency(const InstrItineraryData *ItinData,
349 int getVLDMDefCycle(const InstrItineraryData *ItinData,
353 int getLDMDefCycle(const InstrItineraryData *ItinData,
357 int getVSTMUseCycle(const InstrItineraryData *ItinData,
361 int getSTMUseCycle(const InstrItineraryData *ItinData,
365 int getOperandLatency(const InstrItineraryData *ItinData,
371 int getOperandLatencyImpl(const InstrItineraryData *ItinData,
380 unsigned getInstrLatency(const InstrItineraryData *ItinData,
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| D | ARMHazardRecognizer.h | 34 ARMHazardRecognizer(const InstrItineraryData *ItinData, in ARMHazardRecognizer() argument
36 : ScoreboardHazardRecognizer(ItinData, DAG, "post-RA-sched") {} in ARMHazardRecognizer()
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| D | ARMBaseInstrInfo.cpp | 3327 static unsigned getNumMicroOpsSwiftLdSt(const InstrItineraryData *ItinData, in getNumMicroOpsSwiftLdSt() argument
3332 int UOps = ItinData->getNumMicroOps(Desc.getSchedClass()); in getNumMicroOpsSwiftLdSt()
3629 unsigned ARMBaseInstrInfo::getNumMicroOps(const InstrItineraryData *ItinData, in getNumMicroOps() argument
3631 if (!ItinData || ItinData->isEmpty()) in getNumMicroOps()
3636 int ItinUOps = ItinData->getNumMicroOps(Class); in getNumMicroOps()
3639 return getNumMicroOpsSwiftLdSt(ItinData, MI); in getNumMicroOps()
3743 ARMBaseInstrInfo::getVLDMDefCycle(const InstrItineraryData *ItinData, in getVLDMDefCycle() argument
3750 return ItinData->getOperandCycle(DefClass, DefIdx); in getVLDMDefCycle()
3800 ARMBaseInstrInfo::getLDMDefCycle(const InstrItineraryData *ItinData, in getLDMDefCycle() argument
3807 return ItinData->getOperandCycle(DefClass, DefIdx); in getLDMDefCycle()
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| /external/llvm-project/llvm/lib/Target/ARM/ |
| D | ARMBaseInstrInfo.h | 312 unsigned getNumMicroOps(const InstrItineraryData *ItinData,
315 int getOperandLatency(const InstrItineraryData *ItinData,
319 int getOperandLatency(const InstrItineraryData *ItinData,
401 int getVLDMDefCycle(const InstrItineraryData *ItinData,
405 int getLDMDefCycle(const InstrItineraryData *ItinData,
409 int getVSTMUseCycle(const InstrItineraryData *ItinData,
413 int getSTMUseCycle(const InstrItineraryData *ItinData,
417 int getOperandLatency(const InstrItineraryData *ItinData,
423 int getOperandLatencyImpl(const InstrItineraryData *ItinData,
432 unsigned getInstrLatency(const InstrItineraryData *ItinData,
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| D | ARMBaseInstrInfo.cpp | 3377 static unsigned getNumMicroOpsSwiftLdSt(const InstrItineraryData *ItinData, in getNumMicroOpsSwiftLdSt() argument
3382 int UOps = ItinData->getNumMicroOps(Desc.getSchedClass()); in getNumMicroOpsSwiftLdSt()
3679 unsigned ARMBaseInstrInfo::getNumMicroOps(const InstrItineraryData *ItinData, in getNumMicroOps() argument
3681 if (!ItinData || ItinData->isEmpty()) in getNumMicroOps()
3686 int ItinUOps = ItinData->getNumMicroOps(Class); in getNumMicroOps()
3689 return getNumMicroOpsSwiftLdSt(ItinData, MI); in getNumMicroOps()
3793 ARMBaseInstrInfo::getVLDMDefCycle(const InstrItineraryData *ItinData, in getVLDMDefCycle() argument
3800 return ItinData->getOperandCycle(DefClass, DefIdx); in getVLDMDefCycle()
3834 ARMBaseInstrInfo::getLDMDefCycle(const InstrItineraryData *ItinData, in getLDMDefCycle() argument
3841 return ItinData->getOperandCycle(DefClass, DefIdx); in getLDMDefCycle()
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| /external/llvm/utils/TableGen/ |
| D | SubtargetEmitter.cpp | 76 Record *ItinData, std::string &ItinString,
78 void FormItineraryOperandCycleString(Record *ItinData, std::string &ItinString,
81 Record *ItinData,
274 Record *ItinData, in FormItineraryStageString() argument
279 ItinData->getValueAsListOfDefs("Stages"); in FormItineraryStageString()
318 void SubtargetEmitter::FormItineraryOperandCycleString(Record *ItinData, in FormItineraryOperandCycleString() argument
322 ItinData->getValueAsListOfInts("OperandCycles"); in FormItineraryOperandCycleString()
336 Record *ItinData, in FormItineraryBypassString() argument
340 ItinData->getValueAsListOfDefs("Bypasses"); in FormItineraryBypassString()
439 Record *ItinData = ProcModel.ItinDefList[SchedClassIdx]; in EmitStageAndOperandCycleData() local
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| D | DFAPacketizerEmitter.cpp | 137 Record *ItinData,
740 Record *ItinData, in collectOneInsnClass() argument
743 ItinData->getValueAsListOfDefs("Stages"); in collectOneInsnClass()
748 DEBUG(dbgs() << " " << ItinData->getValueAsDef("TheClass")->getName() in collectOneInsnClass()
819 Record *ItinData = ItinDataList[j]; in collectAllInsnClasses() local
821 FUNameToBitsMap, ItinData, OS); in collectAllInsnClasses()
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCInstrInfo.h | 114 unsigned getInstrLatency(const InstrItineraryData *ItinData,
118 int getOperandLatency(const InstrItineraryData *ItinData,
122 int getOperandLatency(const InstrItineraryData *ItinData, in getOperandLatency() argument
125 return PPCGenInstrInfo::getOperandLatency(ItinData, DefNode, DefIdx, in getOperandLatency()
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| D | PPCHazardRecognizers.h | 35 PPCDispatchGroupSBHazardRecognizer(const InstrItineraryData *ItinData, in PPCDispatchGroupSBHazardRecognizer() argument
37 ScoreboardHazardRecognizer(ItinData, DAG_), DAG(DAG_), in PPCDispatchGroupSBHazardRecognizer()
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| /external/llvm/include/llvm/CodeGen/ |
| D | ScoreboardHazardRecognizer.h | 91 const InstrItineraryData *ItinData; variable
105 ScoreboardHazardRecognizer(const InstrItineraryData *ItinData,
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| /external/llvm-project/llvm/lib/Target/PowerPC/ |
| D | PPCHazardRecognizers.h | 34 PPCDispatchGroupSBHazardRecognizer(const InstrItineraryData *ItinData, in PPCDispatchGroupSBHazardRecognizer() argument
36 ScoreboardHazardRecognizer(ItinData, DAG_), DAG(DAG_), in PPCDispatchGroupSBHazardRecognizer()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| D | PPCHazardRecognizers.h | 34 PPCDispatchGroupSBHazardRecognizer(const InstrItineraryData *ItinData, in PPCDispatchGroupSBHazardRecognizer() argument
36 ScoreboardHazardRecognizer(ItinData, DAG_), DAG(DAG_), in PPCDispatchGroupSBHazardRecognizer()
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| D | PPCInstrInfo.h | 208 unsigned getInstrLatency(const InstrItineraryData *ItinData,
212 int getOperandLatency(const InstrItineraryData *ItinData,
216 int getOperandLatency(const InstrItineraryData *ItinData, in getOperandLatency() argument
219 return PPCGenInstrInfo::getOperandLatency(ItinData, DefNode, DefIdx, in getOperandLatency()
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| /external/llvm-project/llvm/utils/TableGen/ |
| D | SubtargetEmitter.cpp | 82 Record *ItinData, std::string &ItinString,
84 void FormItineraryOperandCycleString(Record *ItinData, std::string &ItinString,
87 Record *ItinData,
297 Record *ItinData, in FormItineraryStageString() argument
301 RecVec StageList = ItinData->getValueAsListOfDefs("Stages"); in FormItineraryStageString()
340 void SubtargetEmitter::FormItineraryOperandCycleString(Record *ItinData, in FormItineraryOperandCycleString() argument
344 ItinData->getValueAsListOfInts("OperandCycles"); in FormItineraryOperandCycleString()
358 Record *ItinData, in FormItineraryBypassString() argument
361 RecVec BypassList = ItinData->getValueAsListOfDefs("Bypasses"); in FormItineraryBypassString()
459 Record *ItinData = ProcModel.ItinDefList[SchedClassIdx]; in EmitStageAndOperandCycleData() local
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| /external/llvm/include/llvm/Target/ |
| D | TargetInstrInfo.h | 1209 virtual unsigned getNumMicroOps(const InstrItineraryData *ItinData,
1220 virtual int getOperandLatency(const InstrItineraryData *ItinData,
1232 virtual int getOperandLatency(const InstrItineraryData *ItinData,
1248 unsigned computeOperandLatency(const InstrItineraryData *ItinData,
1256 virtual unsigned getInstrLatency(const InstrItineraryData *ItinData,
1262 virtual int getInstrLatency(const InstrItineraryData *ItinData,
1269 int computeDefOperandLatency(const InstrItineraryData *ItinData,
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| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | TargetInstrInfo.h | 1441 virtual unsigned getNumMicroOps(const InstrItineraryData *ItinData,
1452 virtual int getOperandLatency(const InstrItineraryData *ItinData,
1464 virtual int getOperandLatency(const InstrItineraryData *ItinData,
1472 virtual unsigned getInstrLatency(const InstrItineraryData *ItinData,
1478 virtual int getInstrLatency(const InstrItineraryData *ItinData,
1485 int computeDefOperandLatency(const InstrItineraryData *ItinData,
|