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Searched refs:Dm (Results 1 – 25 of 47) sorted by relevance

12

/external/vixl/test/aarch32/config/
Dcond-dt-drt-drd-drn-drm-float.json29 "Vabd", // VABD{<c>}{<q>}.F32 {<Dd>}, <Dn>, <Dm> ; T1
30 // VABD{<c>}{<q>}.F32 {<Dd>}, <Dn>, <Dm> ; A1
31 "Vadd", // VADD{<c>}{<q>}.F32 {<Dd>}, <Dn>, <Dm> ; A1
32 // VADD{<c>}{<q>}.F64 {<Dd>}, <Dn>, <Dm> ; A2
33 // VADD{<c>}{<q>}.F32 {<Dd>}, <Dn>, <Dm> ; T1
34 // VADD{<c>}{<q>}.F64 {<Dd>}, <Dn>, <Dm> ; T2
35 "Vceq", // VCEQ{<c>}{<q>}.<dt> {<Dd>}, <Dn>, <Dm> ; A2
36 // VCEQ{<c>}{<q>}.<dt> {<Dd>}, <Dn>, <Dm> ; T2
37 "Vcge", // VCGE{<c>}{<q>}.F32 {<Dd>}, <Dn>, <Dm> ; A2
38 // VCGE{<c>}{<q>}.F32 {<Dd>}, <Dn>, <Dm> ; T2
[all …]
/external/llvm/lib/Target/ARM/
DARMInstrVFP.td337 (outs DPR:$Dd), (ins DPR:$Dn, DPR:$Dm),
338 IIC_fpALU64, "vadd", ".f64\t$Dd, $Dn, $Dm",
339 [(set DPR:$Dd, (fadd DPR:$Dn, (f64 DPR:$Dm)))]>;
359 (outs DPR:$Dd), (ins DPR:$Dn, DPR:$Dm),
360 IIC_fpALU64, "vsub", ".f64\t$Dd, $Dn, $Dm",
361 [(set DPR:$Dd, (fsub DPR:$Dn, (f64 DPR:$Dm)))]>;
381 (outs DPR:$Dd), (ins DPR:$Dn, DPR:$Dm),
382 IIC_fpDIV64, "vdiv", ".f64\t$Dd, $Dn, $Dm",
383 [(set DPR:$Dd, (fdiv DPR:$Dn, (f64 DPR:$Dm)))]>;
399 (outs DPR:$Dd), (ins DPR:$Dn, DPR:$Dm),
[all …]
DARMInstrNEON.td6215 def : NEONInstAlias<"vcvt${p}.s32.f32 $Dd, $Dm, #0",
6216 (VCVTf2sd DPR:$Dd, DPR:$Dm, pred:$p)>;
6217 def : NEONInstAlias<"vcvt${p}.u32.f32 $Dd, $Dm, #0",
6218 (VCVTf2ud DPR:$Dd, DPR:$Dm, pred:$p)>;
6219 def : NEONInstAlias<"vcvt${p}.f32.s32 $Dd, $Dm, #0",
6220 (VCVTs2fd DPR:$Dd, DPR:$Dm, pred:$p)>;
6221 def : NEONInstAlias<"vcvt${p}.f32.u32 $Dd, $Dm, #0",
6222 (VCVTu2fd DPR:$Dd, DPR:$Dm, pred:$p)>;
6233 def : NEONInstAlias<"vcvt${p}.s16.f16 $Dd, $Dm, #0",
6234 (VCVTh2sd DPR:$Dd, DPR:$Dm, pred:$p)>;
[all …]
DARMInstrFormats.td1610 bits<5> Dm;
1613 let Inst{3-0} = Dm{3-0};
1614 let Inst{5} = Dm{4};
1636 bits<5> Dm;
1641 let Inst{3-0} = Dm{3-0};
1642 let Inst{5} = Dm{4};
1663 bits<5> Dm;
1666 let Inst{3-0} = Dm{3-0};
1667 let Inst{5} = Dm{4};
1692 bits<5> Dm;
[all …]
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
DARMInstrVFP.td370 (outs DPR:$Dd), (ins DPR:$Dn, DPR:$Dm),
371 IIC_fpALU64, "vadd", ".f64\t$Dd, $Dn, $Dm",
372 [(set DPR:$Dd, (fadd DPR:$Dn, (f64 DPR:$Dm)))]>,
395 (outs DPR:$Dd), (ins DPR:$Dn, DPR:$Dm),
396 IIC_fpALU64, "vsub", ".f64\t$Dd, $Dn, $Dm",
397 [(set DPR:$Dd, (fsub DPR:$Dn, (f64 DPR:$Dm)))]>,
420 (outs DPR:$Dd), (ins DPR:$Dn, DPR:$Dm),
421 IIC_fpDIV64, "vdiv", ".f64\t$Dd, $Dn, $Dm",
422 [(set DPR:$Dd, (fdiv DPR:$Dn, (f64 DPR:$Dm)))]>,
441 (outs DPR:$Dd), (ins DPR:$Dn, DPR:$Dm),
[all …]
DARMInstrNEON.td5843 def : Pat<(v8i8 (ARMvshls (v8i8 DPR:$Dn), (v8i8 DPR:$Dm))),
5844 (VSHLsv8i8 DPR:$Dn, DPR:$Dm)>;
5845 def : Pat<(v4i16 (ARMvshls (v4i16 DPR:$Dn), (v4i16 DPR:$Dm))),
5846 (VSHLsv4i16 DPR:$Dn, DPR:$Dm)>;
5847 def : Pat<(v2i32 (ARMvshls (v2i32 DPR:$Dn), (v2i32 DPR:$Dm))),
5848 (VSHLsv2i32 DPR:$Dn, DPR:$Dm)>;
5849 def : Pat<(v1i64 (ARMvshls (v1i64 DPR:$Dn), (v1i64 DPR:$Dm))),
5850 (VSHLsv1i64 DPR:$Dn, DPR:$Dm)>;
5851 def : Pat<(v16i8 (ARMvshls (v16i8 QPR:$Dn), (v16i8 QPR:$Dm))),
5852 (VSHLsv16i8 QPR:$Dn, QPR:$Dm)>;
[all …]
DARMInstrFormats.td1742 bits<5> Dm;
1745 let Inst{3-0} = Dm{3-0};
1746 let Inst{5} = Dm{4};
1768 bits<5> Dm;
1773 let Inst{3-0} = Dm{3-0};
1774 let Inst{5} = Dm{4};
1795 bits<5> Dm;
1798 let Inst{3-0} = Dm{3-0};
1799 let Inst{5} = Dm{4};
1824 bits<5> Dm;
[all …]
/external/llvm-project/llvm/lib/Target/ARM/
DARMInstrVFP.td405 (outs DPR:$Dd), (ins DPR:$Dn, DPR:$Dm),
406 IIC_fpALU64, "vadd", ".f64\t$Dd, $Dn, $Dm",
407 [(set DPR:$Dd, (fadd DPR:$Dn, (f64 DPR:$Dm)))]>,
430 (outs DPR:$Dd), (ins DPR:$Dn, DPR:$Dm),
431 IIC_fpALU64, "vsub", ".f64\t$Dd, $Dn, $Dm",
432 [(set DPR:$Dd, (fsub DPR:$Dn, (f64 DPR:$Dm)))]>,
455 (outs DPR:$Dd), (ins DPR:$Dn, DPR:$Dm),
456 IIC_fpDIV64, "vdiv", ".f64\t$Dd, $Dn, $Dm",
457 [(set DPR:$Dd, (fdiv DPR:$Dn, (f64 DPR:$Dm)))]>,
476 (outs DPR:$Dd), (ins DPR:$Dn, DPR:$Dm),
[all …]
DARMInstrNEON.td5841 def : Pat<(v8i8 (ARMvshls (v8i8 DPR:$Dn), (v8i8 DPR:$Dm))),
5842 (VSHLsv8i8 DPR:$Dn, DPR:$Dm)>;
5843 def : Pat<(v4i16 (ARMvshls (v4i16 DPR:$Dn), (v4i16 DPR:$Dm))),
5844 (VSHLsv4i16 DPR:$Dn, DPR:$Dm)>;
5845 def : Pat<(v2i32 (ARMvshls (v2i32 DPR:$Dn), (v2i32 DPR:$Dm))),
5846 (VSHLsv2i32 DPR:$Dn, DPR:$Dm)>;
5847 def : Pat<(v1i64 (ARMvshls (v1i64 DPR:$Dn), (v1i64 DPR:$Dm))),
5848 (VSHLsv1i64 DPR:$Dn, DPR:$Dm)>;
5849 def : Pat<(v16i8 (ARMvshls (v16i8 QPR:$Dn), (v16i8 QPR:$Dm))),
5850 (VSHLsv16i8 QPR:$Dn, QPR:$Dm)>;
[all …]
DARMInstrFormats.td1751 bits<5> Dm;
1754 let Inst{3-0} = Dm{3-0};
1755 let Inst{5} = Dm{4};
1777 bits<5> Dm;
1782 let Inst{3-0} = Dm{3-0};
1783 let Inst{5} = Dm{4};
1804 bits<5> Dm;
1807 let Inst{3-0} = Dm{3-0};
1808 let Inst{5} = Dm{4};
1833 bits<5> Dm;
[all …]
/external/swiftshader/third_party/subzero/src/
DIceAssemblerARM32.cpp1204 IValueT Dm, bool UseQRegs, bool IsFloatTy) { in emitSIMDBase() argument
1210 (getYInRegYXXXX(Dm) << 5) | getXXXXInRegYXXXX(Dm); in emitSIMDBase()
1215 IValueT Dn, IValueT Dm, bool UseQRegs) { in emitSIMD() argument
1219 emitSIMDBase(Opcode | (ElmtSize << ElmtShift), Dd, Dn, Dm, UseQRegs, in emitSIMD()
1272 IValueT Dd, IValueT Dn, IValueT Dm) { in emitVFPddd() argument
1275 assert(Dm < RegARM32::getNumDRegs()); in emitVFPddd()
1282 (getYInRegYXXXX(Dm) << 5) | getXXXXInRegYXXXX(Dm); in emitVFPddd()
1291 IValueT Dm = encodeDRegister(OpDm, "Dm", InstName); in emitVFPddd() local
1292 emitVFPddd(Cond, Opcode, Dd, Dn, Dm); in emitVFPddd()
2348 const IValueT Dm = encodeDRegister(OpDm, "Dm", Vabsd); in vabsd() local
[all …]
DIceAssemblerARM32.h782 void emitVFPsd(CondARM32::Cond Cond, IValueT Opcode, IValueT Sd, IValueT Dm);
838 void emitSIMDBase(IValueT Opcode, IValueT Dd, IValueT Dn, IValueT Dm,
843 void emitSIMD(IValueT Opcode, Type ElmtTy, IValueT Dd, IValueT Dn, IValueT Dm,
897 IValueT Dm);
/external/bc/
Dexec-install.sh60 "$INSTALL" -Dm 755 "$exe" "$installdir/$base$exec_suffix"
/external/llvm-project/llvm/test/ThinLTO/X86/
Ddevirt.ll26 ; NOENABLESPLITFLAG-DAG: [[Dm:\^[0-9]+]] = gv: (name: "_ZN1D1mEi"
29 …0-9]+]] = gv: (name: "_ZTV1D", {{.*}} vTableFuncs: ((virtFunc: [[Dm]], offset: 16)), refs: ([[Dm]])
Ddevirt2.ll30 ; NOENABLESPLITFLAG-DAG: [[Dm:\^[0-9]+]] = gv: (name: "_ZN1D1mEi"
33 …0-9]+]] = gv: (name: "_ZTV1D", {{.*}} vTableFuncs: ((virtFunc: [[Dm]], offset: 16)), refs: ([[Dm]])
/external/ImageMagick/tests/
Dinput_gray.miff11 …HGF?OVZq95565211/-.002<>9DbX1cdeeeeehgr����������������������TBAGKJIJJJ]C=Dm\5::;;:9951/,,/1AD8JK…
/external/exoplayer/tree/testdata/src/test/assets/ts/
Dsample_ait.ts40 �>SJ��/�;R"n�P�2jd��5i=x���-Dm�_[�ݷ�\qGJ4��d�6iQ�'�JT����,�����'Y�ͬ�Ԁ��(��^n��P`U/;Ay�Z�…
/external/ImageMagick/PerlMagick/t/reference/write/read/
Dinput_pgm_p2.miff47 …HGF?OVZq95565211/-.002<>9DbX1cdeeeeehgr����������������������TBAGKJIJJJ]C=Dm\5::;;:9951/,,/1AD8JK…
Dinput_pgm_p5.miff47 …HGF?OVZq95565211/-.002<>9DbX1cdeeeeehgr����������������������TBAGKJIJJJ]C=Dm\5::;;:9951/,,/1AD8JK…
/external/ImageMagick/PerlMagick/t/reference/write/jp2/
Dread_pgx.miff49 …HGF?OVZq95565211/-.002<>9DbX1cdeeeeehgr����������������������TBAGKJIJJJ]C=Dm\5::;;:9951/,,/1AD8JK…
/external/capstone/arch/ARM/
DARMGenAsmWriter.inc9486 // (VADDD DPR:$Dd, DPR:$Dn, DPR:$Dm, pred:$p)
9548 // (VCGEfd DPR:$Dd, DPR:$Dm, DPR:$Dn, pred:$p)
9587 // (VCGEsv2i32 DPR:$Dd, DPR:$Dm, DPR:$Dn, pred:$p)
9600 // (VCGEsv4i16 DPR:$Dd, DPR:$Dm, DPR:$Dn, pred:$p)
9639 // (VCGEsv8i8 DPR:$Dd, DPR:$Dm, DPR:$Dn, pred:$p)
9665 // (VCGEuv2i32 DPR:$Dd, DPR:$Dm, DPR:$Dn, pred:$p)
9678 // (VCGEuv4i16 DPR:$Dd, DPR:$Dm, DPR:$Dn, pred:$p)
9717 // (VCGEuv8i8 DPR:$Dd, DPR:$Dm, DPR:$Dn, pred:$p)
9730 // (VCGTfd DPR:$Dd, DPR:$Dm, DPR:$Dn, pred:$p)
9769 // (VCGTsv2i32 DPR:$Dd, DPR:$Dm, DPR:$Dn, pred:$p)
[all …]
/external/toolchain-utils/android_bench_suite/panorama_input/
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[all …]
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[all …]
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[all …]
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