/external/llvm/lib/MC/ |
D | MCRegisterInfo.cpp | 49 int MCRegisterInfo::getDwarfRegNum(unsigned RegNum, bool isEH) const { in getDwarfRegNum() 60 int MCRegisterInfo::getLLVMRegNum(unsigned RegNum, bool isEH) const { in getLLVMRegNum()
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/external/llvm/lib/Target/Mips/AsmParser/ |
D | MipsAsmParser.cpp | 220 unsigned RegNum; member 317 static MipsOperand *CreateReg(unsigned RegNum, SMLoc S, SMLoc E) { in CreateReg() 721 int MipsAsmParser::matchRegisterByNumber(unsigned RegNum, unsigned RegClass) { in matchRegisterByNumber() 731 int RegNum = -1; in tryParseRegister() local 1059 unsigned RegNum = Tok.getIntVal(); in parseHWRegs() local 1088 unsigned RegNum = Tok.getIntVal(); in parseHW64Regs() local 1104 unsigned RegNum; in parseCCRRegs() local
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/external/llvm/lib/Target/NVPTX/ |
D | NVPTXRegisterInfo.cpp | 141 getDwarfRegNum(unsigned RegNum, bool isEH) const { in getDwarfRegNum()
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/external/llvm/lib/Target/Mips/ |
D | MipsAsmPrinter.cpp | 153 unsigned RegNum = TM.getRegisterInfo()->getEncodingValue(Reg); in printSavedRegsBitmask() local 168 unsigned RegNum = TM.getRegisterInfo()->getEncodingValue(Reg); in printSavedRegsBitmask() local
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/external/llvm/lib/Target/MBlaze/ |
D | MBlazeAsmPrinter.cpp | 137 unsigned RegNum = getMBlazeRegisterNumbering(Reg); in printSavedRegsBitmask() local
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/external/llvm/lib/Target/AArch64/AsmParser/ |
D | AArch64AsmParser.cpp | 182 unsigned RegNum; member 739 static AArch64Operand *CreateReg(unsigned RegNum, SMLoc S, SMLoc E) { in CreateReg() 745 static AArch64Operand *CreateWrappedReg(unsigned RegNum, SMLoc S, SMLoc E) { in CreateWrappedReg() 1429 AArch64AsmParser::IdentifyRegister(unsigned &RegNum, SMLoc &RegEndLoc, in IdentifyRegister() 1485 unsigned RegNum; in ParseRegister() local 1611 unsigned RegNum; in ParseLSXAddressOperand() local
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/external/llvm/lib/Target/X86/ |
D | X86RegisterInfo.cpp | 90 int X86RegisterInfo::getCompactUnwindRegNum(unsigned RegNum, bool isEH) const { in getCompactUnwindRegNum()
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D | X86CodeEmitter.cpp | 1471 unsigned RegNum = getX86RegNum(MO.getReg()) << 4; in emitInstruction() local
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/external/llvm/lib/Target/ARM/AsmParser/ |
D | ARMAsmParser.cpp | 353 unsigned RegNum; member 358 unsigned RegNum; member 387 unsigned RegNum; member 1442 unsigned RegNum = getCondCode() == ARMCC::AL ? 0: ARM::CPSR; in addCondCodeOperands() local 2142 static ARMOperand *CreateCCOut(unsigned RegNum, SMLoc S) { in CreateCCOut() 2159 static ARMOperand *CreateReg(unsigned RegNum, SMLoc S, SMLoc E) { in CreateReg() 2244 static ARMOperand *CreateVectorList(unsigned RegNum, unsigned Count, in CreateVectorList() 2255 static ARMOperand *CreateVectorListAllLanes(unsigned RegNum, unsigned Count, in CreateVectorListAllLanes() 2267 static ARMOperand *CreateVectorListIndexed(unsigned RegNum, unsigned Count, in CreateVectorListIndexed() 2319 static ARMOperand *CreatePostIdxReg(unsigned RegNum, bool isAdd, in CreatePostIdxReg() [all …]
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/external/llvm/lib/Target/MBlaze/AsmParser/ |
D | MBlazeAsmParser.cpp | 91 unsigned RegNum; member
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/external/llvm/lib/Target/X86/MCTargetDesc/ |
D | X86MCCodeEmitter.cpp | 1192 unsigned RegNum = GetX86RegNum(MO) << 4; in EncodeInstruction() local
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/external/llvm/lib/Target/PowerPC/ |
D | PPCCTRLoops.cpp | 141 unsigned RegNum; member
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D | PPCISelLowering.cpp | 1779 unsigned RegNum = State.getFirstUnallocated(ArgRegs, NumArgRegs); in CC_PPC32_SVR4_Custom_AlignArgRegs() local 1807 unsigned RegNum = State.getFirstUnallocated(ArgRegs, NumArgRegs); in CC_PPC32_SVR4_Custom_AlignFPArgRegs() local
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/external/clang/include/clang/Basic/ |
D | TargetInfo.h | 559 const unsigned RegNum; member
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/external/llvm/lib/Target/ARM/InstPrinter/ |
D | ARMInstPrinter.cpp | 954 if (unsigned RegNum = MO2.getReg()) { in printThumbAddrModeRROperand() local
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/external/llvm/lib/Target/ARM/ |
D | ARMCodeEmitter.cpp | 1404 unsigned RegNum = II->getRegisterInfo().getEncodingValue(MO.getReg()); in emitLoadStoreMultipleInstruction() local
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D | ARMLoadStoreOptimizer.cpp | 485 unsigned RegNum = MO.isUndef() ? UINT_MAX : TRI->getEncodingValue(Reg); in MergeLDR_STR() local
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D | ARMISelDAGToDAG.cpp | 3495 unsigned RegNum = InlineAsm::getNumOperandRegisters(Flag); in SelectInlineAsm() local
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/external/llvm/utils/TableGen/ |
D | CodeGenRegisters.cpp | 1288 unsigned RegNum = Registers[i]->EnumValue; in computeUberSets() local
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