| /external/llvm/lib/MC/ |
| D | MCRegisterInfo.cpp | 49 int MCRegisterInfo::getDwarfRegNum(unsigned RegNum, bool isEH) const { in getDwarfRegNum() argument
53 DwarfLLVMRegPair Key = { RegNum, 0 }; in getDwarfRegNum()
55 if (I == M+Size || I->FromReg != RegNum) in getDwarfRegNum()
60 int MCRegisterInfo::getLLVMRegNum(unsigned RegNum, bool isEH) const { in getLLVMRegNum() argument
64 DwarfLLVMRegPair Key = { RegNum, 0 }; in getLLVMRegNum()
66 assert(I != M+Size && I->FromReg == RegNum && "Invalid RegNum"); in getLLVMRegNum()
70 int MCRegisterInfo::getSEHRegNum(unsigned RegNum) const { in getSEHRegNum()
71 const DenseMap<unsigned, int>::const_iterator I = L2SEHRegs.find(RegNum); in getSEHRegNum()
72 if (I == L2SEHRegs.end()) return (int)RegNum; in getSEHRegNum()
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| /external/llvm/lib/Target/Mips/AsmParser/ |
| D | MipsAsmParser.cpp | 152 int matchRegisterByNumber(unsigned RegNum, unsigned RegClass);
220 unsigned RegNum; member
285 return Reg.RegNum; in getReg()
317 static MipsOperand *CreateReg(unsigned RegNum, SMLoc S, SMLoc E) { in CreateReg() argument
319 Op->Reg.RegNum = RegNum; in CreateReg()
347 Inst.addOperand(MCOperand::CreateReg(Reg.RegNum)); in addCPURegsAsmOperands()
354 Inst.addOperand(MCOperand::CreateReg(Reg.RegNum)); in addCPU64RegsAsmOperands()
362 Inst.addOperand(MCOperand::CreateReg(Reg.RegNum)); in addHWRegsAsmOperands()
370 Inst.addOperand(MCOperand::CreateReg(Reg.RegNum)); in addHW64RegsAsmOperands()
374 Inst.addOperand(MCOperand::CreateReg(Reg.RegNum)); in addCCRAsmOperands()
[all …]
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| /external/llvm/lib/Target/AArch64/AsmParser/ |
| D | AArch64AsmParser.cpp | 137 IdentifyRegister(unsigned &RegNum, SMLoc &RegEndLoc, StringRef &LayoutSpec,
182 unsigned RegNum; member
232 return Reg.RegNum; in getReg()
739 static AArch64Operand *CreateReg(unsigned RegNum, SMLoc S, SMLoc E) { in CreateReg() argument
741 Op->Reg.RegNum = RegNum; in CreateReg()
745 static AArch64Operand *CreateWrappedReg(unsigned RegNum, SMLoc S, SMLoc E) { in CreateWrappedReg() argument
747 Op->Reg.RegNum = RegNum; in CreateWrappedReg()
1429 AArch64AsmParser::IdentifyRegister(unsigned &RegNum, SMLoc &RegEndLoc, in IdentifyRegister() argument
1440 RegNum = MatchRegisterName(LowerReg.substr(0, DotPos)); in IdentifyRegister()
1441 if (RegNum == AArch64::NoRegister) { in IdentifyRegister()
[all …]
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| /external/llvm/lib/Target/Mips/ |
| D | MipsAsmPrinter.cpp | 153 unsigned RegNum = TM.getRegisterInfo()->getEncodingValue(Reg); in printSavedRegsBitmask() local
155 FPUBitmask |= (3 << RegNum); in printSavedRegsBitmask()
161 FPUBitmask |= (1 << RegNum); in printSavedRegsBitmask()
168 unsigned RegNum = TM.getRegisterInfo()->getEncodingValue(Reg); in printSavedRegsBitmask() local
169 CPUBitmask |= (1 << RegNum); in printSavedRegsBitmask()
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| /external/llvm/lib/Target/MBlaze/AsmParser/ |
| D | MBlazeAsmParser.cpp | 91 unsigned RegNum; member
149 return Reg.RegNum; in getReg()
236 static MBlazeOperand *CreateReg(unsigned RegNum, SMLoc S, SMLoc E) { in CreateReg()
238 Op->Reg.RegNum = RegNum; in CreateReg()
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| /external/llvm/include/llvm/MC/ |
| D | MCRegisterInfo.h | 365 int getDwarfRegNum(unsigned RegNum, bool isEH) const;
368 int getLLVMRegNum(unsigned RegNum, bool isEH) const;
372 int getSEHRegNum(unsigned RegNum) const;
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| /external/llvm/lib/Target/NVPTX/ |
| D | NVPTXRegisterInfo.h | 61 virtual int getDwarfRegNum(unsigned RegNum, bool isEH) const;
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| D | NVPTXRegisterInfo.cpp | 141 getDwarfRegNum(unsigned RegNum, bool isEH) const { in getDwarfRegNum() argument
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| /external/llvm/lib/Target/MBlaze/ |
| D | MBlazeAsmPrinter.cpp | 137 unsigned RegNum = getMBlazeRegisterNumbering(Reg); in printSavedRegsBitmask() local
139 CPUBitmask |= (1 << RegNum); in printSavedRegsBitmask()
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| /external/llvm/lib/Target/X86/ |
| D | X86RegisterInfo.h | 66 int getCompactUnwindRegNum(unsigned RegNum, bool isEH) const;
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| D | X86CodeEmitter.cpp | 1471 unsigned RegNum = getX86RegNum(MO.getReg()) << 4; in emitInstruction() local
1473 RegNum |= 1 << 7; in emitInstruction()
1481 RegNum |= Val; in emitInstruction()
1484 emitConstant(RegNum, 1); in emitInstruction()
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| D | X86RegisterInfo.cpp | 90 int X86RegisterInfo::getCompactUnwindRegNum(unsigned RegNum, bool isEH) const { in getCompactUnwindRegNum() argument
91 switch (getLLVMRegNum(RegNum, isEH)) { in getCompactUnwindRegNum()
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCCTRLoops.cpp | 141 unsigned RegNum; member
143 Values(unsigned r) : RegNum(r) {} in Values()
160 return Contents.RegNum; in getReg()
163 Contents.RegNum = Val; in setReg()
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| D | PPCISelLowering.cpp | 1779 unsigned RegNum = State.getFirstUnallocated(ArgRegs, NumArgRegs); in CC_PPC32_SVR4_Custom_AlignArgRegs() local
1785 if (RegNum != NumArgRegs && RegNum % 2 == 1) { in CC_PPC32_SVR4_Custom_AlignArgRegs()
1786 State.AllocateReg(ArgRegs[RegNum]); in CC_PPC32_SVR4_Custom_AlignArgRegs()
1807 unsigned RegNum = State.getFirstUnallocated(ArgRegs, NumArgRegs); in CC_PPC32_SVR4_Custom_AlignFPArgRegs() local
1811 if (RegNum != NumArgRegs && ArgRegs[RegNum] == PPC::F8) { in CC_PPC32_SVR4_Custom_AlignFPArgRegs()
1812 State.AllocateReg(ArgRegs[RegNum]); in CC_PPC32_SVR4_Custom_AlignFPArgRegs()
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| /external/clang/lib/Basic/ |
| D | TargetInfo.cpp | 248 if (AddlNames[i].Names[j] == Name && AddlNames[i].RegNum < NumNames) in isValidGCCRegisterName()
301 if (AddlNames[i].Names[j] == Name && AddlNames[i].RegNum < NumNames) in getNormalizedGCCRegisterName()
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| /external/llvm/lib/Target/ARM/AsmParser/ |
| D | ARMAsmParser.cpp | 353 unsigned RegNum; member
358 unsigned RegNum; member
387 unsigned RegNum; member
543 return Reg.RegNum; in getReg()
1172 .contains(VectorList.RegNum)); in isVecListDPair()
1188 .contains(VectorList.RegNum)); in isVecListDPairSpaced()
1215 .contains(VectorList.RegNum)); in isVecListDPairAllLanes()
1442 unsigned RegNum = getCondCode() == ARMCC::AL ? 0: ARM::CPSR; in addCondCodeOperands() local
1443 Inst.addOperand(MCOperand::CreateReg(RegNum)); in addCondCodeOperands()
1779 Inst.addOperand(MCOperand::CreateReg(PostIdxReg.RegNum)); in addAM3OffsetOperands()
[all …]
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| /external/llvm/lib/Target/AArch64/InstPrinter/ |
| D | AArch64InstPrinter.h | 37 void printRegName(raw_ostream &O, unsigned RegNum) const;
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| /external/llvm/lib/Target/X86/MCTargetDesc/ |
| D | X86MCCodeEmitter.cpp | 1192 unsigned RegNum = GetX86RegNum(MO) << 4; in EncodeInstruction() local
1194 RegNum |= 1 << 7; in EncodeInstruction()
1202 RegNum |= Val; in EncodeInstruction()
1205 EmitImmediate(MCOperand::CreateImm(RegNum), MI.getLoc(), 1, FK_Data_1, in EncodeInstruction()
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| /external/clang/include/clang/Basic/ |
| D | TargetInfo.h | 559 const unsigned RegNum; member
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| /external/llvm/lib/Target/ARM/ |
| D | ARMLoadStoreOptimizer.cpp | 485 unsigned RegNum = MO.isUndef() ? UINT_MAX : TRI->getEncodingValue(Reg); in MergeLDR_STR() local
491 ((isNotVFP && RegNum > PRegNum) || in MergeLDR_STR()
492 ((Count < Limit) && RegNum == PRegNum+1))) { in MergeLDR_STR()
494 PRegNum = RegNum; in MergeLDR_STR()
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| D | ARMCodeEmitter.cpp | 1404 unsigned RegNum = II->getRegisterInfo().getEncodingValue(MO.getReg()); in emitLoadStoreMultipleInstruction() local
1406 RegNum < 16); in emitLoadStoreMultipleInstruction()
1407 Binary |= 0x1 << RegNum; in emitLoadStoreMultipleInstruction()
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| D | ARMISelDAGToDAG.cpp | 3495 unsigned RegNum = InlineAsm::getNumOperandRegisters(Flag); in SelectInlineAsm() local
3498 if (!HasRC || RC != ARM::GPRRegClassID || RegNum != 2) in SelectInlineAsm()
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| /external/llvm/lib/Target/R600/ |
| D | AMDILCFGStructurizer.cpp | 282 void addLoopBreakOnReg(LoopT *LoopRep, RegiT RegNum);
283 void addLoopContOnReg(LoopT *LoopRep, RegiT RegNum);
284 void addLoopBreakInitReg(LoopT *LoopRep, RegiT RegNum);
285 void addLoopContInitReg(LoopT *LoopRep, RegiT RegNum);
286 void addLoopEndbranchInitReg(LoopT *LoopRep, RegiT RegNum);
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| /external/llvm/utils/TableGen/ |
| D | CodeGenRegisters.cpp | 1288 unsigned RegNum = Registers[i]->EnumValue; in computeUberSets() local
1289 if (AllocatableRegs.count(RegNum)) in computeUberSets()
1292 UberSetIDs.join(0, RegNum); in computeUberSets()
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| /external/llvm/lib/Target/ARM/InstPrinter/ |
| D | ARMInstPrinter.cpp | 954 if (unsigned RegNum = MO2.getReg()) { in printThumbAddrModeRROperand() local
956 printRegName(O, RegNum); in printThumbAddrModeRROperand()
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