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Searched refs:X86 (Results 1 – 25 of 246) sorted by relevance

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/external/llvm/lib/Target/X86/
DX86InstrInfo.cpp103 (STI.is64Bit() ? X86::ADJCALLSTACKDOWN64 : X86::ADJCALLSTACKDOWN32), in X86InstrInfo()
104 (STI.is64Bit() ? X86::ADJCALLSTACKUP64 : X86::ADJCALLSTACKUP32)), in X86InstrInfo()
108 { X86::ADC32ri, X86::ADC32mi, 0 }, in X86InstrInfo()
109 { X86::ADC32ri8, X86::ADC32mi8, 0 }, in X86InstrInfo()
110 { X86::ADC32rr, X86::ADC32mr, 0 }, in X86InstrInfo()
111 { X86::ADC64ri32, X86::ADC64mi32, 0 }, in X86InstrInfo()
112 { X86::ADC64ri8, X86::ADC64mi8, 0 }, in X86InstrInfo()
113 { X86::ADC64rr, X86::ADC64mr, 0 }, in X86InstrInfo()
114 { X86::ADD16ri, X86::ADD16mi, 0 }, in X86InstrInfo()
115 { X86::ADD16ri8, X86::ADD16mi8, 0 }, in X86InstrInfo()
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DX86RegisterInfo.cpp58 (STI.is64Bit() ? X86::RIP : X86::EIP), in X86RegisterInfo()
61 (STI.is64Bit() ? X86::RIP : X86::EIP)), in X86RegisterInfo()
71 StackPtr = X86::RSP; in X86RegisterInfo()
72 FramePtr = X86::RBP; in X86RegisterInfo()
75 StackPtr = X86::ESP; in X86RegisterInfo()
76 FramePtr = X86::EBP; in X86RegisterInfo()
81 BasePtr = Is64Bit ? X86::RBX : X86::ESI; in X86RegisterInfo()
100 if (!Is64Bit && Idx == X86::sub_8bit) in getSubClassWithSubReg()
101 Idx = X86::sub_8bit_hi; in getSubClassWithSubReg()
112 if (!Is64Bit && SubIdx == X86::sub_8bit) { in getMatchingSuperRegClass()
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DX86FloatingPoint.cpp120 if (Reg < X86::FP0 || Reg > X86::FP6) in calcLiveInMask()
122 Mask |= 1 << (Reg - X86::FP0); in calcLiveInMask()
225 return StackTop - 1 - getSlot(RegNo) + X86::ST0; in getSTReg()
254 BuildMI(*MBB, I, dl, TII->get(X86::XCH_F)).addReg(STReg); in moveToTop()
263 BuildMI(*MBB, I, dl, TII->get(X86::LD_Frr)).addReg(STReg); in duplicateToTop()
320 return X86::RFP80RegClass.contains(DstReg) || in isFPCopy()
321 X86::RFP80RegClass.contains(SrcReg); in isFPCopy()
334 assert(Reg >= X86::FP0 && Reg <= X86::FP6 && "Expected FP register!"); in getFPReg()
335 return Reg - X86::FP0; in getFPReg()
346 assert(X86::FP6 == X86::FP0+6 && "Register enums aren't sorted right!"); in runOnMachineFunction()
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DX86MCInstLower.cpp250 if (Reg != X86::AL && Reg != X86::AX && Reg != X86::EAX && Reg != X86::RAX) in SimplifyShortImmForm()
268 case X86::MOVSX16rr8: // movsbw %al, %ax --> cbtw in SimplifyMOVSX()
269 if (Op0 == X86::AX && Op1 == X86::AL) in SimplifyMOVSX()
270 NewOpcode = X86::CBW; in SimplifyMOVSX()
272 case X86::MOVSX32rr16: // movswl %ax, %eax --> cwtl in SimplifyMOVSX()
273 if (Op0 == X86::EAX && Op1 == X86::AX) in SimplifyMOVSX()
274 NewOpcode = X86::CWDE; in SimplifyMOVSX()
276 case X86::MOVSX64rr32: // movslq %eax, %rax --> cltq in SimplifyMOVSX()
277 if (Op0 == X86::RAX && Op1 == X86::EAX) in SimplifyMOVSX()
278 NewOpcode = X86::CDQE; in SimplifyMOVSX()
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DX86FrameLowering.cpp62 return X86::SUB64ri8; in getSUBriOpcode()
63 return X86::SUB64ri32; in getSUBriOpcode()
66 return X86::SUB32ri8; in getSUBriOpcode()
67 return X86::SUB32ri; in getSUBriOpcode()
74 return X86::ADD64ri8; in getADDriOpcode()
75 return X86::ADD64ri32; in getADDriOpcode()
78 return X86::ADD32ri8; in getADDriOpcode()
79 return X86::ADD32ri; in getADDriOpcode()
84 return IsLP64 ? X86::LEA64r : X86::LEA32r; in getLEArOpcode()
100 X86::EAX, X86::EDX, X86::ECX, 0 in findDeadCallerSavedReg()
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DX86FastISel.cpp161 bool foldX86XALUIntrinsic(X86::CondCode &CC, const Instruction *I,
207 static std::pair<X86::CondCode, bool>
209 X86::CondCode CC = X86::COND_INVALID; in getX86ConditionCode()
214 case CmpInst::FCMP_UEQ: CC = X86::COND_E; break; in getX86ConditionCode()
216 case CmpInst::FCMP_OGT: CC = X86::COND_A; break; in getX86ConditionCode()
218 case CmpInst::FCMP_OGE: CC = X86::COND_AE; break; in getX86ConditionCode()
220 case CmpInst::FCMP_ULT: CC = X86::COND_B; break; in getX86ConditionCode()
222 case CmpInst::FCMP_ULE: CC = X86::COND_BE; break; in getX86ConditionCode()
223 case CmpInst::FCMP_ONE: CC = X86::COND_NE; break; in getX86ConditionCode()
224 case CmpInst::FCMP_UNO: CC = X86::COND_P; break; in getX86ConditionCode()
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DX86ISelDAGToDAG.cpp94 return RegNode->getReg() == X86::RIP; in isRIPRelative()
571 Subtarget->is64Bit() ? X86::CALL64pcrel32 : X86::CALLpcrel32; in EmitSpecialCodeForMain()
599 if (!X86::isOffsetSuitableForCodeModel(Val, M, in FoldOffsetIntoAddress()
627 AM.Segment = CurDAG->getRegister(X86::GS, MVT::i16); in MatchLoadInAddress()
630 AM.Segment = CurDAG->getRegister(X86::FS, MVT::i16); in MatchLoadInAddress()
695 AM.setBaseReg(CurDAG->getRegister(X86::RIP, MVT::i64)); in MatchWrapper()
760 AM.Base_Reg = CurDAG->getRegister(X86::RIP, MVT::i64); in MatchAddress()
1327 AM.Segment = CurDAG->getRegister(X86::GS, MVT::i16); in SelectAddr()
1329 AM.Segment = CurDAG->getRegister(X86::FS, MVT::i16); in SelectAddr()
1438 CurDAG->getTargetConstant(X86::sub_32bit, MVT::i32)), in SelectLEA64_32Addr()
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DX86FixupLEAs.cpp104 case X86::MOV32rr: in postRAConvertToLEA()
105 case X86::MOV64rr: { in postRAConvertToLEA()
109 TII->get(MI->getOpcode() == X86::MOV32rr ? X86::LEA32r in postRAConvertToLEA()
110 : X86::LEA64r)) in postRAConvertToLEA()
120 case X86::ADD64ri32: in postRAConvertToLEA()
121 case X86::ADD64ri8: in postRAConvertToLEA()
122 case X86::ADD64ri32_DB: in postRAConvertToLEA()
123 case X86::ADD64ri8_DB: in postRAConvertToLEA()
124 case X86::ADD32ri: in postRAConvertToLEA()
125 case X86::ADD32ri8: in postRAConvertToLEA()
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DX86CodeEmitter.cpp150 if (Desc.getOpcode() == X86::MOVPC32r) in runOnMachineFunction()
151 emitInstruction(*I, &II->get(X86::POP32r)); in runOnMachineFunction()
222 unsigned e = (isTwoAddr ? X86::AddrNumOperands+1 : X86::AddrNumOperands); in determineREX()
263 X86::reloc_pcrel_word, MBB)); in emitPCRelativeBlockAddress()
277 if (Reloc == X86::reloc_picrel_word) in emitGlobalAddress()
279 else if (Reloc == X86::reloc_pcrel_word) in emitGlobalAddress()
289 if (Reloc == X86::reloc_absolute_dword) in emitGlobalAddress()
301 intptr_t RelocCST = (Reloc == X86::reloc_picrel_word) ? PICBaseOffset : 0; in emitExternalSymbolAddress()
311 if (Reloc == X86::reloc_absolute_dword) in emitExternalSymbolAddress()
325 if (Reloc == X86::reloc_picrel_word) in emitConstPoolAddress()
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/external/llvm/lib/Target/X86/AsmParser/
DX86AsmInstrumentation.cpp36 return Reg == X86::RSP || Reg == X86::ESP || Reg == X86::SP; in IsStackReg()
104 case X86::MOV8mi: in InstrumentMOV()
105 case X86::MOV8mr: in InstrumentMOV()
106 case X86::MOV8rm: in InstrumentMOV()
109 case X86::MOV16mi: in InstrumentMOV()
110 case X86::MOV16mr: in InstrumentMOV()
111 case X86::MOV16rm: in InstrumentMOV()
114 case X86::MOV32mi: in InstrumentMOV()
115 case X86::MOV32mr: in InstrumentMOV()
116 case X86::MOV32rm: in InstrumentMOV()
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DX86Operand.h235 getMemIndexReg() >= X86::XMM0 && getMemIndexReg() <= X86::XMM15; in isMemVX32()
239 getMemIndexReg() >= X86::YMM0 && getMemIndexReg() <= X86::YMM15; in isMemVY32()
243 getMemIndexReg() >= X86::XMM0 && getMemIndexReg() <= X86::XMM15; in isMemVX64()
247 getMemIndexReg() >= X86::YMM0 && getMemIndexReg() <= X86::YMM15; in isMemVY64()
251 getMemIndexReg() >= X86::ZMM0 && getMemIndexReg() <= X86::ZMM31; in isMemVZ32()
255 getMemIndexReg() >= X86::ZMM0 && getMemIndexReg() <= X86::ZMM31; in isMemVZ64()
265 (getMemBaseReg() == X86::RSI || getMemBaseReg() == X86::ESI || in isSrcIdx()
266 getMemBaseReg() == X86::SI) && isa<MCConstantExpr>(getMemDisp()) && in isSrcIdx()
284 (getMemSegReg() == 0 || getMemSegReg() == X86::ES) && in isDstIdx()
285 (getMemBaseReg() == X86::RDI || getMemBaseReg() == X86::EDI || in isDstIdx()
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DX86AsmParser.cpp712 return (STI.getFeatureBits() & X86::Mode64Bit) != 0; in is64BitMode()
716 return (STI.getFeatureBits() & X86::Mode32Bit) != 0; in is32BitMode()
720 return (STI.getFeatureBits() & X86::Mode16Bit) != 0; in is16BitMode()
724 (X86::Mode64Bit | X86::Mode32Bit | X86::Mode16Bit); in SwitchMode()
728 (X86::Mode64Bit | X86::Mode32Bit | X86::Mode16Bit))); in SwitchMode()
778 if (X86MCRegisterClasses[X86::GR64RegClassID].contains(BaseReg) && in CheckBaseRegAndIndexReg()
779 (X86MCRegisterClasses[X86::GR16RegClassID].contains(IndexReg) || in CheckBaseRegAndIndexReg()
780 X86MCRegisterClasses[X86::GR32RegClassID].contains(IndexReg)) && in CheckBaseRegAndIndexReg()
781 IndexReg != X86::RIZ) { in CheckBaseRegAndIndexReg()
785 if (X86MCRegisterClasses[X86::GR32RegClassID].contains(BaseReg) && in CheckBaseRegAndIndexReg()
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/external/llvm/lib/Target/X86/MCTargetDesc/
DX86AsmBackend.cpp51 case X86::reloc_riprel_4byte: in getFixupKindLog2Size()
52 case X86::reloc_riprel_4byte_movq_load: in getFixupKindLog2Size()
53 case X86::reloc_signed_4byte: in getFixupKindLog2Size()
54 case X86::reloc_global_offset_table: in getFixupKindLog2Size()
61 case X86::reloc_global_offset_table8: in getFixupKindLog2Size()
90 return X86::NumTargetFixupKinds; in getNumFixupKinds()
94 const static MCFixupKindInfo Infos[X86::NumTargetFixupKinds] = { in getFixupKindInfo()
144 case X86::JAE_1: return X86::JAE_4; in getRelaxedOpcodeBranch()
145 case X86::JA_1: return X86::JA_4; in getRelaxedOpcodeBranch()
146 case X86::JBE_1: return X86::JBE_4; in getRelaxedOpcodeBranch()
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DX86BaseInfo.h27 namespace X86 {
722 if ((RegNo > X86::XMM7 && RegNo <= X86::XMM15) || in isX86_64ExtendedReg()
723 (RegNo > X86::XMM23 && RegNo <= X86::XMM31) || in isX86_64ExtendedReg()
724 (RegNo > X86::YMM7 && RegNo <= X86::YMM15) || in isX86_64ExtendedReg()
725 (RegNo > X86::YMM23 && RegNo <= X86::YMM31) || in isX86_64ExtendedReg()
726 (RegNo > X86::ZMM7 && RegNo <= X86::ZMM15) || in isX86_64ExtendedReg()
727 (RegNo > X86::ZMM23 && RegNo <= X86::ZMM31)) in isX86_64ExtendedReg()
732 case X86::R8: case X86::R9: case X86::R10: case X86::R11: in isX86_64ExtendedReg()
733 case X86::R12: case X86::R13: case X86::R14: case X86::R15: in isX86_64ExtendedReg()
734 case X86::R8D: case X86::R9D: case X86::R10D: case X86::R11D: in isX86_64ExtendedReg()
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/external/llvm/lib/Target/X86/InstPrinter/
DX86InstComments.cpp38 case X86::INSERTPSrr: in EmitAnyX86InstComments()
39 case X86::VINSERTPSrr: in EmitAnyX86InstComments()
47 case X86::MOVLHPSrr: in EmitAnyX86InstComments()
48 case X86::VMOVLHPSrr: in EmitAnyX86InstComments()
55 case X86::MOVHLPSrr: in EmitAnyX86InstComments()
56 case X86::VMOVHLPSrr: in EmitAnyX86InstComments()
63 case X86::PALIGNR128rr: in EmitAnyX86InstComments()
64 case X86::VPALIGNR128rr: in EmitAnyX86InstComments()
67 case X86::PALIGNR128rm: in EmitAnyX86InstComments()
68 case X86::VPALIGNR128rm: in EmitAnyX86InstComments()
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/external/llvm/test/Object/
Dobj2yaml.test2 RUN: obj2yaml %p/Inputs/trivial-object-test.coff-x86-64 | FileCheck %s --check-prefix COFF-X86-64
5 RUN: obj2yaml %p/Inputs/trivial-object-test.elf-x86-64 | FileCheck %s --check-prefix ELF-X86-64
90 COFF-X86-64: header:
91 COFF-X86-64-NEXT: Machine: IMAGE_FILE_MACHINE_AMD64
93 COFF-X86-64: sections:
94 COFF-X86-64-NEXT: - Name: .text
95 COFF-X86-64-NEXT: Characteristics: [ IMAGE_SCN_CNT_CODE, IMAGE_SCN_MEM_EXECUTE, IMAGE_SCN_MEM_R…
96 COFF-X86-64-NEXT: Alignment: 16
97 COFF-X86-64-NEXT: SectionData: 4883EC28C744242400000000488D0D00000000E800000000E8000000008B4424…
99 COFF-X86-64: Relocations:
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/external/llvm/lib/Target/X86/Disassembler/
DX86Disassembler.cpp60 namespace X86 { namespace
85 (X86::Mode16Bit | X86::Mode32Bit | X86::Mode64Bit)) { in X86GenericDisassembler()
86 case X86::Mode16Bit: in X86GenericDisassembler()
89 case X86::Mode32Bit: in X86GenericDisassembler()
92 case X86::Mode64Bit: in X86GenericDisassembler()
175 #define ENTRY(x) X86::x, in translateRegister()
228 X86::CS,
229 X86::SS,
230 X86::DS,
231 X86::ES,
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/external/llvm/test/CodeGen/X86/
Dh-registers-0.ll1 ; RUN: llc < %s -mattr=-bmi -mtriple=x86_64-linux | FileCheck %s -check-prefix=X86-64
3 ; RUN: llc < %s -mattr=-bmi -march=x86 | FileCheck %s -check-prefix=X86-32
9 ; X86-64-LABEL: bar64:
10 ; X86-64: shrq $8, %rdi
11 ; X86-64: incb %dil
19 ; X86-32-LABEL: bar64:
20 ; X86-32: incb %ah
29 ; X86-64-LABEL: bar32:
30 ; X86-64: shrl $8, %edi
31 ; X86-64: incb %dil
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Dvec_shuffle-14.ll1 ; RUN: llc < %s -march=x86 -mattr=+sse2,-avx | FileCheck %s -check-prefix=X86-32
2 ; RUN: llc < %s -march=x86-64 -mattr=+sse2,-avx | FileCheck %s -check-prefix=X86-64
10 ; X86-32-LABEL: t1:
11 ; X86-32: movd 4(%esp), %xmm0
13 ; X86-64-LABEL: t1:
14 ; X86-64: movd %e{{..}}, %xmm0
23 ; X86-32-LABEL: t2:
24 ; X86-32: movq 4(%esp), %xmm0
26 ; X86-64-LABEL: t2:
27 ; X86-64: movd %r{{..}}, %xmm0
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/external/llvm/test/tools/llvm-readobj/
Dprogram-headers.test4 RUN: | FileCheck %s -check-prefix ELF-X86-64
39 ELF-X86-64: ProgramHeaders [
40 ELF-X86-64-NEXT: ProgramHeader {
41 ELF-X86-64-NEXT: Type: PT_LOAD (0x1)
42 ELF-X86-64-NEXT: Offset: 0x0
43 ELF-X86-64-NEXT: VirtualAddress: 0x400000
44 ELF-X86-64-NEXT: PhysicalAddress: 0x400000
45 ELF-X86-64-NEXT: FileSize: 312
46 ELF-X86-64-NEXT: MemSize: 312
47 ELF-X86-64-NEXT: Flags [ (0x5)
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Ddynamic.test75 RUN: | FileCheck %s -check-prefix ELF-X86-EXE
77 ELF-X86-EXE: Format: ELF32-i386
78 ELF-X86-EXE: Arch: i386
79 ELF-X86-EXE: AddressSize: 32bit
80 ELF-X86-EXE: LoadName:
81 ELF-X86-EXE: DynamicSection [ (30 entries)
82 ELF-X86-EXE: Tag Type Name/Value
83 ELF-X86-EXE: 0x00000001 NEEDED SharedLibrary (libstdc++.so.6)
84 ELF-X86-EXE: 0x00000001 NEEDED SharedLibrary (libgcc_s.so.1)
85 ELF-X86-EXE: 0x00000001 NEEDED SharedLibrary (libc.so.6)
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/external/llvm/test/DebugInfo/COFF/
Dmultifunction.ll1 ; RUN: llc -mcpu=core2 -mtriple=i686-pc-win32 -O0 < %s | FileCheck --check-prefix=X86 %s
25 ; X86-LABEL: _x:
26 ; X86-NEXT: # BB
27 ; X86-NEXT: [[X_CALL:.*]]:{{$}}
28 ; X86-NEXT: calll _z
29 ; X86-NEXT: [[X_RETURN:.*]]:
30 ; X86-NEXT: ret
31 ; X86-NEXT: [[END_OF_X:.*]]:
33 ; X86-LABEL: _y:
34 ; X86-NEXT: # BB
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Dmultifile.ll1 ; RUN: llc -mcpu=core2 -mtriple=i686-pc-win32 -O0 < %s | FileCheck --check-prefix=X86 %s
19 ; X86-LABEL: _f:
20 ; X86-NEXT: # BB
21 ; X86-NEXT: [[CALL_LINE_1:.*]]:{{$}}
22 ; X86-NEXT: calll _g
23 ; X86-NEXT: [[CALL_LINE_2:.*]]:{{$}}
24 ; X86-NEXT: calll _g
25 ; X86-NEXT: [[CALL_LINE_3:.*]]:{{$}}
26 ; X86-NEXT: calll _g
27 ; X86-NEXT: [[RETURN_STMT:.*]]:
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Dasm.ll1 ; RUN: llc -mcpu=core2 -mtriple=i686-pc-win32 -O0 < %s | FileCheck --check-prefix=X86 %s
15 ; X86-LABEL: _f:
16 ; X86-NEXT: # BB
17 ; X86-NEXT: [[ASM_LINE:^L.*]]:{{$}}
18 ; X86: [[CALL_LINE:^L.*]]:{{$}}
19 ; X86-NEXT: calll _g
20 ; X86-NEXT: [[RETURN_STMT:.*]]:
21 ; X86-NEXT: ret
22 ; X86-NEXT: [[END_OF_F:.*]]:
24 ; X86-LABEL: .section .debug$S,"rnd"
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Dsimple.ll1 ; RUN: llc -mcpu=core2 -mtriple=i686-pc-win32 -O0 < %s | FileCheck --check-prefix=X86 %s
14 ; X86-LABEL: _f:
15 ; X86-NEXT: # BB
16 ; X86-NEXT: [[CALL_LINE:^L.*]]:{{$}}
17 ; X86-NEXT: calll _g
18 ; X86-NEXT: [[RETURN_STMT:.*]]:
19 ; X86-NEXT: ret
20 ; X86-NEXT: [[END_OF_F:.*]]:
22 ; X86-LABEL: .section .debug$S,"rnd"
23 ; X86-NEXT: .long 4
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