/arch/mips/kernel/ |
D | cpu-probe.c | 77 static inline void cpu_set_fpu_fcsr_mask(struct cpuinfo_mips *c) in cpu_set_fpu_fcsr_mask() argument 81 fcsr = c->fpu_csr31; in cpu_set_fpu_fcsr_mask() 99 c->fpu_msk31 = ~(fcsr0 ^ fcsr1) & ~mask; in cpu_set_fpu_fcsr_mask() 106 static void cpu_set_fpu_2008(struct cpuinfo_mips *c) in cpu_set_fpu_2008() argument 108 if (c->isa_level & (MIPS_CPU_ISA_M32R1 | MIPS_CPU_ISA_M64R1 | in cpu_set_fpu_2008() 131 c->options |= MIPS_CPU_NAN_LEGACY; in cpu_set_fpu_2008() 133 c->options |= MIPS_CPU_NAN_2008; in cpu_set_fpu_2008() 136 c->fpu_msk31 &= ~FPU_CSR_ABS2008; in cpu_set_fpu_2008() 138 c->fpu_csr31 |= fcsr & FPU_CSR_ABS2008; in cpu_set_fpu_2008() 141 c->fpu_msk31 &= ~FPU_CSR_NAN2008; in cpu_set_fpu_2008() [all …]
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/arch/x86/kernel/cpu/ |
D | amd.c | 89 static void init_amd_k5(struct cpuinfo_x86 *c) in init_amd_k5() argument 101 if (c->x86_model == 9 || c->x86_model == 10) { in init_amd_k5() 108 static void init_amd_k6(struct cpuinfo_x86 *c) in init_amd_k6() argument 114 if (c->x86_model < 6) { in init_amd_k6() 116 if (c->x86_model == 0) { in init_amd_k6() 117 clear_cpu_cap(c, X86_FEATURE_APIC); in init_amd_k6() 118 set_cpu_cap(c, X86_FEATURE_PGE); in init_amd_k6() 123 if (c->x86_model == 6 && c->x86_stepping == 1) { in init_amd_k6() 152 if (c->x86_model < 8 || in init_amd_k6() 153 (c->x86_model == 8 && c->x86_stepping < 8)) { in init_amd_k6() [all …]
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D | intel.c | 48 void check_mpx_erratum(struct cpuinfo_x86 *c) in check_mpx_erratum() argument 63 if (cpu_has(c, X86_FEATURE_MPX) && !cpu_has(c, X86_FEATURE_SMEP)) { in check_mpx_erratum() 78 static void probe_xeon_phi_r3mwait(struct cpuinfo_x86 *c) in probe_xeon_phi_r3mwait() argument 84 if (c->x86 != 6) in probe_xeon_phi_r3mwait() 86 switch (c->x86_model) { in probe_xeon_phi_r3mwait() 97 set_cpu_cap(c, X86_FEATURE_RING3MWAIT); in probe_xeon_phi_r3mwait() 101 if (c == &boot_cpu_data) in probe_xeon_phi_r3mwait() 142 static bool bad_spectre_microcode(struct cpuinfo_x86 *c) in bad_spectre_microcode() argument 150 if (cpu_has(c, X86_FEATURE_HYPERVISOR)) in bad_spectre_microcode() 153 if (c->x86 != 6) in bad_spectre_microcode() [all …]
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D | common.c | 85 static void default_init(struct cpuinfo_x86 *c) in default_init() argument 88 cpu_detect_cache_sizes(c); in default_init() 92 if (c->cpuid_level == -1) { in default_init() 94 if (c->x86 == 4) in default_init() 95 strcpy(c->x86_model_id, "486"); in default_init() 96 else if (c->x86 == 3) in default_init() 97 strcpy(c->x86_model_id, "386"); in default_init() 267 static void squash_the_stupid_serial_number(struct cpuinfo_x86 *c) in squash_the_stupid_serial_number() argument 271 if (!cpu_has(c, X86_FEATURE_PN) || !disable_x86_serial_nr) in squash_the_stupid_serial_number() 281 clear_cpu_cap(c, X86_FEATURE_PN); in squash_the_stupid_serial_number() [all …]
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D | centaur.c | 21 static void init_c3(struct cpuinfo_x86 *c) in init_c3() argument 48 c->x86_capability[CPUID_C000_0001_EDX] = cpuid_edx(0xC0000001); in init_c3() 52 if (c->x86_model >= 6 && c->x86_model <= 13) { in init_c3() 56 set_cpu_cap(c, X86_FEATURE_CX8); in init_c3() 60 if (c->x86_model >= 6 && c->x86_model < 9) in init_c3() 61 set_cpu_cap(c, X86_FEATURE_3DNOW); in init_c3() 63 if (c->x86 == 0x6 && c->x86_model >= 0xf) { in init_c3() 64 c->x86_cache_alignment = c->x86_clflush_size * 2; in init_c3() 65 set_cpu_cap(c, X86_FEATURE_REP_GOOD); in init_c3() 68 cpu_detect_cache_sizes(c); in init_c3() [all …]
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D | proc.c | 13 static void show_cpuinfo_core(struct seq_file *m, struct cpuinfo_x86 *c, in show_cpuinfo_core() argument 17 seq_printf(m, "physical id\t: %d\n", c->phys_proc_id); in show_cpuinfo_core() 20 seq_printf(m, "core id\t\t: %d\n", c->cpu_core_id); in show_cpuinfo_core() 21 seq_printf(m, "cpu cores\t: %d\n", c->booted_cores); in show_cpuinfo_core() 22 seq_printf(m, "apicid\t\t: %d\n", c->apicid); in show_cpuinfo_core() 23 seq_printf(m, "initial apicid\t: %d\n", c->initial_apicid); in show_cpuinfo_core() 28 static void show_cpuinfo_misc(struct seq_file *m, struct cpuinfo_x86 *c) in show_cpuinfo_misc() argument 43 c->cpuid_level); in show_cpuinfo_misc() 46 static void show_cpuinfo_misc(struct seq_file *m, struct cpuinfo_x86 *c) in show_cpuinfo_misc() argument 53 c->cpuid_level); in show_cpuinfo_misc() [all …]
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D | cyrix.c | 93 static void check_cx686_slop(struct cpuinfo_x86 *c) in check_cx686_slop() argument 112 c->loops_per_jiffy = loops_per_jiffy; in check_cx686_slop() 172 static void early_init_cyrix(struct cpuinfo_x86 *c) in early_init_cyrix() argument 182 set_cpu_cap(c, X86_FEATURE_CYRIX_ARR); in early_init_cyrix() 186 set_cpu_cap(c, X86_FEATURE_CYRIX_ARR); in early_init_cyrix() 191 static void init_cyrix(struct cpuinfo_x86 *c) in init_cyrix() argument 194 char *buf = c->x86_model_id; in init_cyrix() 201 clear_cpu_cap(c, 0*32+31); in init_cyrix() 204 if (test_cpu_cap(c, 1*32+24)) { in init_cyrix() 205 clear_cpu_cap(c, 1*32+24); in init_cyrix() [all …]
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/arch/mips/mm/ |
D | c-octeon.c | 190 struct cpuinfo_mips *c = ¤t_cpu_data; in probe_octeon() local 197 c->icache.linesz = 2 << ((config1 >> 19) & 7); in probe_octeon() 198 c->icache.sets = 64 << ((config1 >> 22) & 7); in probe_octeon() 199 c->icache.ways = 1 + ((config1 >> 16) & 7); in probe_octeon() 200 c->icache.flags |= MIPS_CACHE_VTAG; in probe_octeon() 202 c->icache.sets * c->icache.ways * c->icache.linesz; in probe_octeon() 203 c->icache.waybit = ffs(icache_size / c->icache.ways) - 1; in probe_octeon() 204 c->dcache.linesz = 128; in probe_octeon() 206 c->dcache.sets = 2; /* CN5XXX has two Dcache sets */ in probe_octeon() 208 c->dcache.sets = 1; /* CN3XXX has one Dcache set */ in probe_octeon() [all …]
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D | c-r4k.c | 1134 static inline int alias_74k_erratum(struct cpuinfo_mips *c) in alias_74k_erratum() argument 1136 unsigned int imp = c->processor_id & PRID_IMP_MASK; in alias_74k_erratum() 1137 unsigned int rev = c->processor_id & PRID_REV_MASK; in alias_74k_erratum() 1189 struct cpuinfo_mips *c = ¤t_cpu_data; in probe_pcache() local 1202 c->icache.linesz = 16 << ((config & CONF_IB) >> 5); in probe_pcache() 1203 c->icache.ways = 2; in probe_pcache() 1204 c->icache.waybit = __ffs(icache_size/2); in probe_pcache() 1207 c->dcache.linesz = 16 << ((config & CONF_DB) >> 4); in probe_pcache() 1208 c->dcache.ways = 2; in probe_pcache() 1209 c->dcache.waybit= __ffs(dcache_size/2); in probe_pcache() [all …]
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D | sc-mips.c | 120 static inline int mips_sc_is_activated(struct cpuinfo_mips *c) in mips_sc_is_activated() argument 143 c->scache.linesz = 2 << tmp; in mips_sc_is_activated() 151 struct cpuinfo_mips *c = ¤t_cpu_data; in mips_sc_probe_cm3() local 161 c->scache.sets = 64 << sets; in mips_sc_probe_cm3() 166 c->scache.linesz = 2 << line_sz; in mips_sc_probe_cm3() 170 c->scache.ways = assoc + 1; in mips_sc_probe_cm3() 171 c->scache.waysize = c->scache.sets * c->scache.linesz; in mips_sc_probe_cm3() 172 c->scache.waybit = __ffs(c->scache.waysize); in mips_sc_probe_cm3() 174 if (c->scache.linesz) { in mips_sc_probe_cm3() 175 c->scache.flags &= ~MIPS_CACHE_NOT_PRESENT; in mips_sc_probe_cm3() [all …]
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/arch/arm64/include/asm/ |
D | arch_gicv3.h | 117 #define gic_read_typer(c) readq_relaxed(c) argument 118 #define gic_write_irouter(v, c) writeq_relaxed(v, c) argument 119 #define gic_read_lpir(c) readq_relaxed(c) argument 120 #define gic_write_lpir(v, c) writeq_relaxed(v, c) argument 124 #define gits_read_baser(c) readq_relaxed(c) argument 125 #define gits_write_baser(v, c) writeq_relaxed(v, c) argument 127 #define gits_read_cbaser(c) readq_relaxed(c) argument 128 #define gits_write_cbaser(v, c) writeq_relaxed(v, c) argument 130 #define gits_write_cwriter(v, c) writeq_relaxed(v, c) argument 132 #define gicr_read_propbaser(c) readq_relaxed(c) argument [all …]
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D | io.h | 135 #define readb_relaxed(c) ({ u8 __r = __raw_readb(c); __r; }) argument 136 #define readw_relaxed(c) ({ u16 __r = le16_to_cpu((__force __le16)__raw_readw(c)); __r; }) argument 137 #define readl_relaxed(c) ({ u32 __r = le32_to_cpu((__force __le32)__raw_readl(c)); __r; }) argument 138 #define readq_relaxed(c) ({ u64 __r = le64_to_cpu((__force __le64)__raw_readq(c)); __r; }) argument 140 #define writeb_relaxed(v,c) ((void)__raw_writeb((v),(c))) argument 141 #define writew_relaxed(v,c) ((void)__raw_writew((__force u16)cpu_to_le16(v),(c))) argument 142 #define writel_relaxed(v,c) ((void)__raw_writel((__force u32)cpu_to_le32(v),(c))) argument 143 #define writeq_relaxed(v,c) ((void)__raw_writeq((__force u64)cpu_to_le64(v),(c))) argument 150 #define readb(c) ({ u8 __v = readb_relaxed(c); __iormb(__v); __v; }) argument 151 #define readw(c) ({ u16 __v = readw_relaxed(c); __iormb(__v); __v; }) argument [all …]
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/arch/microblaze/lib/ |
D | memmove.c | 35 void *memmove(void *v_dst, const void *v_src, __kernel_size_t c) in memmove() argument 40 if (!c) in memmove() 45 return memcpy(v_dst, v_src, c); in memmove() 48 src += c; in memmove() 49 dst += c; in memmove() 52 while (c--) in memmove() 58 void *memmove(void *v_dst, const void *v_src, __kernel_size_t c) in memmove() argument 65 if (!c) in memmove() 70 return memcpy(v_dst, v_src, c); in memmove() 80 dst += c; in memmove() [all …]
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D | memcpy.c | 36 void *memcpy(void *v_dst, const void *v_src, __kernel_size_t c) in memcpy() argument 42 while (c--) in memcpy() 48 void *memcpy(void *v_dst, const void *v_src, __kernel_size_t c) in memcpy() argument 62 if (likely(c >= 4)) { in memcpy() 70 --c; in memcpy() 73 --c; in memcpy() 76 --c; in memcpy() 87 for (; c >= 4; c -= 4) in memcpy() 99 for (; c >= 4; c -= 4) { in memcpy() 108 for (; c >= 4; c -= 4) { in memcpy() [all …]
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D | memset.c | 35 void *memset(void *v_src, int c, __kernel_size_t n) in memset() argument 40 c = (c & 0xFF); in memset() 44 *src++ = c; in memset() 49 void *memset(void *v_src, int c, __kernel_size_t n) in memset() argument 56 c = (c & 0xFF); in memset() 58 if (unlikely(c)) { in memset() 60 w32 = c; in memset() 70 *src++ = c; in memset() 73 *src++ = c; in memset() 76 *src++ = c; in memset() [all …]
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/arch/mips/alchemy/common/ |
D | clock.c | 238 struct clk *c; in alchemy_clk_setup_aux() local 255 c = clk_register(NULL, &a->hw); in alchemy_clk_setup_aux() 256 if (!IS_ERR(c)) in alchemy_clk_setup_aux() 257 clk_register_clkdev(c, name, NULL); in alchemy_clk_setup_aux() 261 return c; in alchemy_clk_setup_aux() 269 struct clk *c; in alchemy_clk_setup_sysbus() local 271 c = clk_register_fixed_factor(NULL, ALCHEMY_SYSBUS_CLK, in alchemy_clk_setup_sysbus() 273 if (!IS_ERR(c)) in alchemy_clk_setup_sysbus() 274 clk_register_clkdev(c, ALCHEMY_SYSBUS_CLK, NULL); in alchemy_clk_setup_sysbus() 275 return c; in alchemy_clk_setup_sysbus() [all …]
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/arch/x86/lib/ |
D | cmdline.c | 12 static inline int myisspace(u8 c) in myisspace() argument 14 return c <= ' '; /* Close enough approximation */ in myisspace() 32 char c; in __cmdline_find_option_bool() local 49 c = *(char *)cmdline++; in __cmdline_find_option_bool() 54 if (!c) in __cmdline_find_option_bool() 56 else if (myisspace(c)) in __cmdline_find_option_bool() 72 if (!c || myisspace(c)) in __cmdline_find_option_bool() 79 } else if (!c) { in __cmdline_find_option_bool() 85 } else if (c == *opptr++) { in __cmdline_find_option_bool() 96 if (!c) in __cmdline_find_option_bool() [all …]
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/arch/x86/boot/ |
D | cmdline.c | 17 static inline int myisspace(u8 c) in myisspace() argument 19 return c <= ' '; /* Close enough approximation */ in myisspace() 33 char c; in __cmdline_find_option() local 50 while (cptr < 0x10000 && (c = rdfs8(cptr++))) { in __cmdline_find_option() 53 if (myisspace(c)) in __cmdline_find_option() 62 if (c == '=' && !*opptr) { in __cmdline_find_option() 66 } else if (myisspace(c)) { in __cmdline_find_option() 68 } else if (c != *opptr++) { in __cmdline_find_option() 74 if (myisspace(c)) in __cmdline_find_option() 79 if (myisspace(c)) { in __cmdline_find_option() [all …]
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/arch/sparc/crypto/ |
D | opcodes.h | 18 #define CRC32C(a,b,c) \ argument 19 .word (F3F(2,0x36,0x147)|RS1(a)|RS2(b)|RD(c)); 30 #define AES_EROUND01(a,b,c,d) \ argument 31 .word (F3F(2, 0x19, 0)|RS1(a)|RS2(b)|RS3(c)|RD(d)); 32 #define AES_EROUND23(a,b,c,d) \ argument 33 .word (F3F(2, 0x19, 1)|RS1(a)|RS2(b)|RS3(c)|RD(d)); 34 #define AES_DROUND01(a,b,c,d) \ argument 35 .word (F3F(2, 0x19, 2)|RS1(a)|RS2(b)|RS3(c)|RD(d)); 36 #define AES_DROUND23(a,b,c,d) \ argument 37 .word (F3F(2, 0x19, 3)|RS1(a)|RS2(b)|RS3(c)|RD(d)); [all …]
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/arch/powerpc/boot/ |
D | Makefile | 89 zlib-decomp-$(CONFIG_KERNEL_GZIP) := decompress_inflate.c 90 zlib-$(CONFIG_KERNEL_GZIP) := inffast.c inflate.c inftrees.c 106 libfdt := fdt.c fdt_ro.c fdt_wip.c fdt_sw.c fdt_rw.c fdt_strerror.c 113 src-wlib-y := string.S crt0.S stdio.c decompress.c main.c \ 114 $(libfdt) libfdt-wrapper.c \ 115 ns16550.c serial.c simple_alloc.c div64.S util.S \ 116 elf_util.c $(zlib-y) devtree.c stdlib.c \ 117 oflib.c ofconsole.c cuboot.c cpm-serial.c \ 118 uartlite.c opal.c 119 src-wlib-$(CONFIG_PPC_MPC52XX) += mpc52xx-psc.c [all …]
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D | .gitignore | 2 decompress_inflate.c 3 empty.c 5 inffast.c 8 inflate.c 10 inftrees.c 12 infutil.c 14 kernel-vmlinux.strip.c 38 fdt.c 40 fdt_ro.c 41 fdt_rw.c [all …]
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/arch/sh/kernel/cpu/ |
D | proc.c | 35 const char *get_cpu_subtype(struct sh_cpuinfo *c) in get_cpu_subtype() argument 37 return cpu_name[c->type]; in get_cpu_subtype() 48 static void show_cpuflags(struct seq_file *m, struct sh_cpuinfo *c) in show_cpuflags() argument 54 if (!c->flags) { in show_cpuflags() 60 if ((c->flags & (1 << i))) in show_cpuflags() 82 struct sh_cpuinfo *c = v; in show_cpuinfo() local 83 unsigned int cpu = c - cpu_data; in show_cpuinfo() 95 seq_printf(m, "cpu type\t: %s\n", get_cpu_subtype(c)); in show_cpuinfo() 96 if (c->cut_major == -1) in show_cpuinfo() 98 else if (c->cut_minor == -1) in show_cpuinfo() [all …]
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/arch/x86/include/asm/ |
D | atomic64_32.h | 318 long long old, c = 0; in atomic64_and() local 320 while ((old = atomic64_cmpxchg(v, c, c & i)) != c) in atomic64_and() 321 c = old; in atomic64_and() 326 long long old, c = 0; in atomic64_fetch_and() local 328 while ((old = atomic64_cmpxchg(v, c, c & i)) != c) in atomic64_fetch_and() 329 c = old; in atomic64_fetch_and() 336 long long old, c = 0; in atomic64_or() local 338 while ((old = atomic64_cmpxchg(v, c, c | i)) != c) in atomic64_or() 339 c = old; in atomic64_or() 344 long long old, c = 0; in atomic64_fetch_or() local [all …]
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/arch/m68k/lib/ |
D | memset.c | 10 void *memset(void *s, int c, size_t count) in memset() argument 17 c &= 0xff; in memset() 18 c |= c << 8; in memset() 19 c |= c << 16; in memset() 22 *cs++ = c; in memset() 28 *ss++ = c; in memset() 37 *ls++ = c; in memset() 59 : "d" (c), "0" (ls), "1" (temp)); in memset() 65 *ss++ = c; in memset() 70 *cs = c; in memset()
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/arch/microblaze/include/asm/ |
D | hash.h | 35 unsigned int b, c; in __hash_32() local 39 c = (a << 19) + a; in __hash_32() 40 a = (a << 9) + c; in __hash_32() 47 a += c; /* (a << 8) + (b << 3) + c */ in __hash_32() 62 unsigned int b, c, d; in __hash_32() 65 c = b << 1; /* 1 5 */ in __hash_32() 67 c += b; /* 1 7 */ in __hash_32() 68 c <<= 3; /* 3 10 */ in __hash_32() 69 c -= a; /* 1 11 */ in __hash_32() 70 d = c << 7; /* 7 18 */ in __hash_32() [all …]
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