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Searched refs:rps (Results 1 – 25 of 38) sorted by relevance

12

/drivers/clocksource/
Dtimer-oxnas-rps.c62 struct oxnas_rps_timer *rps = dev_id; in oxnas_rps_timer_irq() local
64 writel_relaxed(0, rps->clkevt_base + TIMER_CLRINT_REG); in oxnas_rps_timer_irq()
66 rps->clkevent.event_handler(&rps->clkevent); in oxnas_rps_timer_irq()
71 static void oxnas_rps_timer_config(struct oxnas_rps_timer *rps, in oxnas_rps_timer_config() argument
75 uint32_t cfg = rps->timer_prescaler; in oxnas_rps_timer_config()
83 writel_relaxed(period, rps->clkevt_base + TIMER_LOAD_REG); in oxnas_rps_timer_config()
84 writel_relaxed(cfg, rps->clkevt_base + TIMER_CTRL_REG); in oxnas_rps_timer_config()
89 struct oxnas_rps_timer *rps = in oxnas_rps_timer_shutdown() local
92 oxnas_rps_timer_config(rps, 0, 0); in oxnas_rps_timer_shutdown()
99 struct oxnas_rps_timer *rps = in oxnas_rps_timer_set_periodic() local
[all …]
DMakefile58 obj-$(CONFIG_OXNAS_RPS_TIMER) += timer-oxnas-rps.o
/drivers/gpu/drm/i915/
Di915_sysfs.c291 dev_priv->gt_pm.rps.cur_freq)); in gt_cur_freq_mhz_show()
300 dev_priv->gt_pm.rps.boost_freq)); in gt_boost_freq_mhz_show()
308 struct intel_rps *rps = &dev_priv->gt_pm.rps; in gt_boost_freq_mhz_store() local
319 if (val < rps->min_freq || val > rps->max_freq) in gt_boost_freq_mhz_store()
322 mutex_lock(&rps->lock); in gt_boost_freq_mhz_store()
323 if (val != rps->boost_freq) { in gt_boost_freq_mhz_store()
324 rps->boost_freq = val; in gt_boost_freq_mhz_store()
325 boost = atomic_read(&rps->num_waiters); in gt_boost_freq_mhz_store()
327 mutex_unlock(&rps->lock); in gt_boost_freq_mhz_store()
329 schedule_work(&rps->work); in gt_boost_freq_mhz_store()
[all …]
Dintel_pm.c6544 struct intel_rps *rps = &dev_priv->gt_pm.rps; in intel_rps_limits() local
6554 limits = (rps->max_freq_softlimit) << 23; in intel_rps_limits()
6555 if (val <= rps->min_freq_softlimit) in intel_rps_limits()
6556 limits |= (rps->min_freq_softlimit) << 14; in intel_rps_limits()
6558 limits = rps->max_freq_softlimit << 24; in intel_rps_limits()
6559 if (val <= rps->min_freq_softlimit) in intel_rps_limits()
6560 limits |= rps->min_freq_softlimit << 16; in intel_rps_limits()
6568 struct intel_rps *rps = &dev_priv->gt_pm.rps; in rps_set_power() local
6572 lockdep_assert_held(&rps->power.mutex); in rps_set_power()
6574 if (new_power == rps->power.mode) in rps_set_power()
[all …]
Di915_irq.c346 dev_priv->gt_pm.rps.pm_iir = 0; in gen11_reset_rps_interrupts()
357 dev_priv->gt_pm.rps.pm_iir = 0; in gen6_reset_rps_interrupts()
364 struct intel_rps *rps = &dev_priv->gt_pm.rps; in gen6_enable_rps_interrupts() local
366 if (READ_ONCE(rps->interrupts_enabled)) in gen6_enable_rps_interrupts()
370 WARN_ON_ONCE(rps->pm_iir); in gen6_enable_rps_interrupts()
377 rps->interrupts_enabled = true; in gen6_enable_rps_interrupts()
385 return mask & ~i915->gt_pm.rps.pm_intrmsk_mbz; in gen6_sanitize_rps_pm_mask()
390 struct intel_rps *rps = &dev_priv->gt_pm.rps; in gen6_disable_rps_interrupts() local
393 if (!READ_ONCE(rps->interrupts_enabled)) in gen6_disable_rps_interrupts()
397 rps->interrupts_enabled = false; in gen6_disable_rps_interrupts()
[all …]
Di915_debugfs.c775 struct intel_rps *rps = &dev_priv->gt_pm.rps; in i915_frequency_info() local
814 intel_gpu_freq(dev_priv, rps->cur_freq)); in i915_frequency_info()
817 intel_gpu_freq(dev_priv, rps->max_freq)); in i915_frequency_info()
820 intel_gpu_freq(dev_priv, rps->min_freq)); in i915_frequency_info()
823 intel_gpu_freq(dev_priv, rps->idle_freq)); in i915_frequency_info()
827 intel_gpu_freq(dev_priv, rps->efficient_freq)); in i915_frequency_info()
915 rps->pm_intrmsk_mbz); in i915_frequency_info()
936 rps->power.up_threshold); in i915_frequency_info()
945 rps->power.down_threshold); in i915_frequency_info()
967 intel_gpu_freq(dev_priv, rps->max_freq)); in i915_frequency_info()
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/drivers/gpu/drm/radeon/
Drs780_dpm.c36 static struct igp_ps *rs780_get_ps(struct radeon_ps *rps) in rs780_get_ps() argument
38 struct igp_ps *ps = rps->ps_priv; in rs780_get_ps()
720 struct radeon_ps *rps, in rs780_parse_pplib_non_clock_info() argument
724 rps->caps = le32_to_cpu(non_clock_info->ulCapsAndSettings); in rs780_parse_pplib_non_clock_info()
725 rps->class = le16_to_cpu(non_clock_info->usClassification); in rs780_parse_pplib_non_clock_info()
726 rps->class2 = le16_to_cpu(non_clock_info->usClassification2); in rs780_parse_pplib_non_clock_info()
729 rps->vclk = le32_to_cpu(non_clock_info->ulVCLK); in rs780_parse_pplib_non_clock_info()
730 rps->dclk = le32_to_cpu(non_clock_info->ulDCLK); in rs780_parse_pplib_non_clock_info()
732 rps->vclk = 0; in rs780_parse_pplib_non_clock_info()
733 rps->dclk = 0; in rs780_parse_pplib_non_clock_info()
[all …]
Dtrinity_dpm.c349 static struct trinity_ps *trinity_get_ps(struct radeon_ps *rps) in trinity_get_ps() argument
351 struct trinity_ps *ps = rps->ps_priv; in trinity_get_ps()
871 struct radeon_ps *rps) in trinity_setup_uvd_clock_table() argument
873 struct trinity_ps *ps = trinity_get_ps(rps); in trinity_setup_uvd_clock_table()
897 static bool trinity_uvd_clocks_zero(struct radeon_ps *rps) in trinity_uvd_clocks_zero() argument
899 if ((rps->vclk == 0) && (rps->dclk == 0)) in trinity_uvd_clocks_zero()
1069 struct radeon_ps *rps) in trinity_update_current_ps() argument
1071 struct trinity_ps *new_ps = trinity_get_ps(rps); in trinity_update_current_ps()
1074 pi->current_rps = *rps; in trinity_update_current_ps()
1080 struct radeon_ps *rps) in trinity_update_requested_ps() argument
[all …]
Dsumo_dpm.c74 static struct sumo_ps *sumo_get_ps(struct radeon_ps *rps) in sumo_get_ps() argument
76 struct sumo_ps *ps = rps->ps_priv; in sumo_get_ps()
342 struct radeon_ps *rps) in sumo_program_bsp() argument
345 struct sumo_ps *ps = sumo_get_ps(rps); in sumo_program_bsp()
385 struct radeon_ps *rps) in sumo_program_at() argument
388 struct sumo_ps *ps = sumo_get_ps(rps); in sumo_program_at()
664 struct radeon_ps *rps) in sumo_patch_boost_state() argument
667 struct sumo_ps *new_ps = sumo_get_ps(rps); in sumo_patch_boost_state()
714 struct radeon_ps *rps, in sumo_enable_boost() argument
717 struct sumo_ps *new_ps = sumo_get_ps(rps); in sumo_enable_boost()
[all …]
Drv770_dpm.c47 struct rv7xx_ps *rv770_get_ps(struct radeon_ps *rps) in rv770_get_ps() argument
49 struct rv7xx_ps *ps = rps->ps_priv; in rv770_get_ps()
2144 struct radeon_ps *rps, in rv7xx_parse_pplib_non_clock_info() argument
2148 rps->caps = le32_to_cpu(non_clock_info->ulCapsAndSettings); in rv7xx_parse_pplib_non_clock_info()
2149 rps->class = le16_to_cpu(non_clock_info->usClassification); in rv7xx_parse_pplib_non_clock_info()
2150 rps->class2 = le16_to_cpu(non_clock_info->usClassification2); in rv7xx_parse_pplib_non_clock_info()
2153 rps->vclk = le32_to_cpu(non_clock_info->ulVCLK); in rv7xx_parse_pplib_non_clock_info()
2154 rps->dclk = le32_to_cpu(non_clock_info->ulDCLK); in rv7xx_parse_pplib_non_clock_info()
2156 rps->vclk = 0; in rv7xx_parse_pplib_non_clock_info()
2157 rps->dclk = 0; in rv7xx_parse_pplib_non_clock_info()
[all …]
Drv6xx_dpm.c36 static struct rv6xx_ps *rv6xx_get_ps(struct radeon_ps *rps) in rv6xx_get_ps() argument
38 struct rv6xx_ps *ps = rps->ps_priv; in rv6xx_get_ps()
1795 struct radeon_ps *rps, in rv6xx_parse_pplib_non_clock_info() argument
1798 rps->caps = le32_to_cpu(non_clock_info->ulCapsAndSettings); in rv6xx_parse_pplib_non_clock_info()
1799 rps->class = le16_to_cpu(non_clock_info->usClassification); in rv6xx_parse_pplib_non_clock_info()
1800 rps->class2 = le16_to_cpu(non_clock_info->usClassification2); in rv6xx_parse_pplib_non_clock_info()
1802 if (r600_is_uvd_state(rps->class, rps->class2)) { in rv6xx_parse_pplib_non_clock_info()
1803 rps->vclk = RV6XX_DEFAULT_VCLK_FREQ; in rv6xx_parse_pplib_non_clock_info()
1804 rps->dclk = RV6XX_DEFAULT_DCLK_FREQ; in rv6xx_parse_pplib_non_clock_info()
1806 rps->vclk = 0; in rv6xx_parse_pplib_non_clock_info()
[all …]
Dni_dpm.c735 struct ni_ps *ni_get_ps(struct radeon_ps *rps) in ni_get_ps() argument
737 struct ni_ps *ps = rps->ps_priv; in ni_get_ps()
788 struct radeon_ps *rps) in ni_apply_state_adjust_rules() argument
790 struct ni_ps *ps = ni_get_ps(rps); in ni_apply_state_adjust_rules()
3562 struct radeon_ps *rps) in ni_update_current_ps() argument
3564 struct ni_ps *new_ps = ni_get_ps(rps); in ni_update_current_ps()
3568 eg_pi->current_rps = *rps; in ni_update_current_ps()
3574 struct radeon_ps *rps) in ni_update_requested_ps() argument
3576 struct ni_ps *new_ps = ni_get_ps(rps); in ni_update_requested_ps()
3580 eg_pi->requested_rps = *rps; in ni_update_requested_ps()
[all …]
Dkv_dpm.c244 static struct kv_ps *kv_get_ps(struct radeon_ps *rps) in kv_get_ps() argument
246 struct kv_ps *ps = rps->ps_priv; in kv_get_ps()
1141 struct radeon_ps *rps) in kv_update_current_ps() argument
1143 struct kv_ps *new_ps = kv_get_ps(rps); in kv_update_current_ps()
1146 pi->current_rps = *rps; in kv_update_current_ps()
1152 struct radeon_ps *rps) in kv_update_requested_ps() argument
1154 struct kv_ps *new_ps = kv_get_ps(rps); in kv_update_requested_ps()
1157 pi->requested_rps = *rps; in kv_update_requested_ps()
2585 struct radeon_ps *rps, in kv_parse_pplib_non_clock_info() argument
2589 struct kv_ps *ps = kv_get_ps(rps); in kv_parse_pplib_non_clock_info()
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Dbtc_dpm.c52 struct rv7xx_ps *rv770_get_ps(struct radeon_ps *rps);
2097 struct radeon_ps *rps) in btc_apply_state_adjust_rules() argument
2099 struct rv7xx_ps *ps = rv770_get_ps(rps); in btc_apply_state_adjust_rules()
2260 struct radeon_ps *rps) in btc_update_current_ps() argument
2262 struct rv7xx_ps *new_ps = rv770_get_ps(rps); in btc_update_current_ps()
2265 eg_pi->current_rps = *rps; in btc_update_current_ps()
2271 struct radeon_ps *rps) in btc_update_requested_ps() argument
2273 struct rv7xx_ps *new_ps = rv770_get_ps(rps); in btc_update_requested_ps()
2276 eg_pi->requested_rps = *rps; in btc_update_requested_ps()
2740 struct radeon_ps *rps = &eg_pi->current_rps; in btc_dpm_debugfs_print_current_performance_level() local
[all …]
Dsi_dpm.c1742 struct ni_ps *ni_get_ps(struct radeon_ps *rps);
2969 struct radeon_ps *rps) in si_apply_state_adjust_rules() argument
2971 struct ni_ps *ps = ni_get_ps(rps); in si_apply_state_adjust_rules()
3007 if (rps->vce_active) { in si_apply_state_adjust_rules()
3008 rps->evclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].evclk; in si_apply_state_adjust_rules()
3009 rps->ecclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].ecclk; in si_apply_state_adjust_rules()
3010 si_get_vce_clock_voltage(rdev, rps->evclk, rps->ecclk, in si_apply_state_adjust_rules()
3013 rps->evclk = 0; in si_apply_state_adjust_rules()
3014 rps->ecclk = 0; in si_apply_state_adjust_rules()
3021 if (rps->vclk || rps->dclk) { in si_apply_state_adjust_rules()
[all …]
Dci_dpm.c203 static struct ci_ps *ci_get_ps(struct radeon_ps *rps) in ci_get_ps() argument
205 struct ci_ps *ps = rps->ps_priv; in ci_get_ps()
796 struct radeon_ps *rps) in ci_apply_state_adjust_rules() argument
798 struct ci_ps *ps = ci_get_ps(rps); in ci_apply_state_adjust_rules()
805 if (rps->vce_active) { in ci_apply_state_adjust_rules()
806 rps->evclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].evclk; in ci_apply_state_adjust_rules()
807 rps->ecclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].ecclk; in ci_apply_state_adjust_rules()
809 rps->evclk = 0; in ci_apply_state_adjust_rules()
810 rps->ecclk = 0; in ci_apply_state_adjust_rules()
819 if ((rps->class & ATOM_PPLIB_CLASSIFICATION_UI_MASK) == ATOM_PPLIB_CLASSIFICATION_UI_BATTERY) in ci_apply_state_adjust_rules()
[all …]
Dni_dpm.h237 struct radeon_ps *rps);
239 struct radeon_ps *rps);
/drivers/staging/comedi/drivers/
Ds626.c1280 u32 *rps; in s626_reset_adc() local
1290 rps = (u32 *)devpriv->rps_buf.logical_base; in s626_reset_adc()
1299 *rps++ = S626_RPS_PAUSE | S626_RPS_SIGADC; in s626_reset_adc()
1300 *rps++ = S626_RPS_CLRSIGNAL | S626_RPS_SIGADC; in s626_reset_adc()
1312 *rps++ = S626_RPS_LDREG | (S626_P_DEBICMD >> 2); in s626_reset_adc()
1313 *rps++ = S626_DEBI_CMD_WRWORD | S626_LP_GSEL; in s626_reset_adc()
1314 *rps++ = S626_RPS_LDREG | (S626_P_DEBIAD >> 2); in s626_reset_adc()
1316 *rps++ = S626_GSEL_BIPOLAR5V; /* arbitrary immediate data value. */ in s626_reset_adc()
1317 *rps++ = S626_RPS_CLRSIGNAL | S626_RPS_DEBI; in s626_reset_adc()
1320 *rps++ = S626_RPS_UPLOAD | S626_RPS_DEBI; in s626_reset_adc()
[all …]
/drivers/gpu/drm/amd/amdgpu/
Dkv_dpm.c370 static struct kv_ps *kv_get_ps(struct amdgpu_ps *rps) in kv_get_ps() argument
372 struct kv_ps *ps = rps->ps_priv; in kv_get_ps()
1223 struct amdgpu_ps *rps) in kv_update_current_ps() argument
1225 struct kv_ps *new_ps = kv_get_ps(rps); in kv_update_current_ps()
1228 pi->current_rps = *rps; in kv_update_current_ps()
1235 struct amdgpu_ps *rps) in kv_update_requested_ps() argument
1237 struct kv_ps *new_ps = kv_get_ps(rps); in kv_update_requested_ps()
1240 pi->requested_rps = *rps; in kv_update_requested_ps()
2653 struct amdgpu_ps *rps, in kv_parse_pplib_non_clock_info() argument
2657 struct kv_ps *ps = kv_get_ps(rps); in kv_parse_pplib_non_clock_info()
[all …]
Dsi_dpm.c1836 static struct si_ps *si_get_ps(struct amdgpu_ps *rps);
3147 struct amdgpu_ps *rps) in ni_update_current_ps() argument
3149 struct si_ps *new_ps = si_get_ps(rps); in ni_update_current_ps()
3153 eg_pi->current_rps = *rps; in ni_update_current_ps()
3160 struct amdgpu_ps *rps) in ni_update_requested_ps() argument
3162 struct si_ps *new_ps = si_get_ps(rps); in ni_update_requested_ps()
3166 eg_pi->requested_rps = *rps; in ni_update_requested_ps()
3428 struct amdgpu_ps *rps) in si_apply_state_adjust_rules() argument
3430 struct si_ps *ps = si_get_ps(rps); in si_apply_state_adjust_rules()
3466 if (rps->vce_active) { in si_apply_state_adjust_rules()
[all …]
Damdgpu_dpm.h337 #define amdgpu_dpm_check_state_equal(adev, cps, rps, equal) \ argument
338 …((adev)->powerplay.pp_funcs->check_state_equal((adev)->powerplay.pp_handle, (cps), (rps), (equal)))
495 struct amdgpu_ps *rps);
Damdgpu_dpm.c106 struct amdgpu_ps *rps) in amdgpu_dpm_print_ps_status() argument
109 if (rps == adev->pm.dpm.current_ps) in amdgpu_dpm_print_ps_status()
111 if (rps == adev->pm.dpm.requested_ps) in amdgpu_dpm_print_ps_status()
113 if (rps == adev->pm.dpm.boot_ps) in amdgpu_dpm_print_ps_status()
/drivers/gpu/drm/i915/gt/uc/
Dintel_guc_submission.c1007 struct intel_rps *rps = &gt->i915->gt_pm.rps; in guc_interrupts_capture() local
1047 rps->pm_intrmsk_mbz |= ARAT_EXPIRED_INTRMSK; in guc_interrupts_capture()
1048 rps->pm_intrmsk_mbz &= ~GEN8_PMINTR_DISABLE_REDIRECT_TO_GUC; in guc_interrupts_capture()
1053 struct intel_rps *rps = &gt->i915->gt_pm.rps; in guc_interrupts_release() local
1073 rps->pm_intrmsk_mbz |= GEN8_PMINTR_DISABLE_REDIRECT_TO_GUC; in guc_interrupts_release()
1074 rps->pm_intrmsk_mbz &= ~ARAT_EXPIRED_INTRMSK; in guc_interrupts_release()
/drivers/scsi/aic94xx/
Daic94xx_dev.c166 if (rps_resp->rps.affil_valid) in asd_init_target_ddb()
168 if (rps_resp->rps.affil_supp) in asd_init_target_ddb()
/drivers/md/
Draid1.c136 struct resync_pages *rps; in r1buf_pool_alloc() local
142 rps = kmalloc_array(pi->raid_disks, sizeof(struct resync_pages), in r1buf_pool_alloc()
144 if (!rps) in r1buf_pool_alloc()
167 struct resync_pages *rp = &rps[j]; in r1buf_pool_alloc()
175 memcpy(rp, &rps[0], sizeof(*rp)); in r1buf_pool_alloc()
189 resync_free_pages(&rps[j]); in r1buf_pool_alloc()
194 kfree(rps); in r1buf_pool_alloc()
2607 struct resync_pages *rps; in raid1_alloc_init_r1buf() local
2613 rps = bio->bi_private; in raid1_alloc_init_r1buf()
2615 bio->bi_private = rps; in raid1_alloc_init_r1buf()

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