| /third_party/uboot/u-boot-2020.01/arch/arm/cpu/armv7/hi3519av100/ |
| D | lowlevel_init_v300.c | 192 ddrc_isvalid[NUM_1] = in ddr_scramb()
199 if (ddrc_isvalid[NUM_1]) in ddr_scramb()
206 reg_val[NUM_1] = ddrc_isvalid[NUM_1] ? in ddr_scramb()
208 } while (!(reg_val[NUM_0] & reg_val[NUM_1])); in ddr_scramb()
229 if (ddrc_isvalid[NUM_1]) in ddr_scramb()
236 reg_val[NUM_1] = ddrc_isvalid[NUM_1] ? in ddr_scramb()
238 } while (reg_val[NUM_0] | reg_val[NUM_1]); in ddr_scramb()
316 core_value[NUM_1] = 0; in get_hpm_value()
321 mda_value[NUM_1] = 0; in get_hpm_value()
326 cpu_value[NUM_1] = 0; in get_hpm_value()
[all …]
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| /third_party/uboot/u-boot-2020.01/arch/arm/cpu/armv8/hi3569v100/ |
| D | lowlevel_init_v300.c | 186 ddrc_isvalid[NUM_1] = in ddr_scramb()
197 if (ddrc_isvalid[NUM_1]) in ddr_scramb()
210 reg_val[NUM_1] = ddrc_isvalid[NUM_1] ? (reg_get(REG_BASE_DDRC + in ddr_scramb()
216 } while (!(reg_val[NUM_0] & reg_val[NUM_1] & reg_val[NUM_2] & reg_val[NUM_3])); in ddr_scramb()
237 if (ddrc_isvalid[NUM_1]) in ddr_scramb()
250 reg_val[NUM_1] = ddrc_isvalid[NUM_1] ? (reg_get(REG_BASE_DDRC + in ddr_scramb()
256 } while (reg_val[NUM_0] | reg_val[NUM_1] | reg_val[NUM_2] | reg_val[NUM_3]); in ddr_scramb()
366 cpu_value[NUM_1] += (temp >> 16) & 0x3ff; /* get hight 16 bits */ in get_hpm_value()
374 mda_value[NUM_1] += (temp >> 16) & 0x3ff; /* get hight 16 bits */ in get_hpm_value()
382 gpu_value[NUM_1] += (temp >> 16) & 0x3ff; /* get hight 16 bits */ in get_hpm_value()
[all …]
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| /third_party/uboot/u-boot-2020.01/arch/arm/cpu/armv8/hi3559av100/ |
| D | lowlevel_init_v300.c | 186 ddrc_isvalid[NUM_1] = in ddr_scramb()
197 if (ddrc_isvalid[NUM_1]) in ddr_scramb()
210 reg_val[NUM_1] = ddrc_isvalid[NUM_1] ? (reg_get(REG_BASE_DDRC + in ddr_scramb()
216 } while (!(reg_val[NUM_0] & reg_val[NUM_1] & reg_val[NUM_2] & reg_val[NUM_3])); in ddr_scramb()
237 if (ddrc_isvalid[NUM_1]) in ddr_scramb()
250 reg_val[NUM_1] = ddrc_isvalid[NUM_1] ? (reg_get(REG_BASE_DDRC + in ddr_scramb()
256 } while (reg_val[NUM_0] | reg_val[NUM_1] | reg_val[NUM_2] | reg_val[NUM_3]); in ddr_scramb()
366 cpu_value[NUM_1] += (temp >> 16) & 0x3ff; /* get hight 16 bits */ in get_hpm_value()
374 mda_value[NUM_1] += (temp >> 16) & 0x3ff; /* get hight 16 bits */ in get_hpm_value()
382 gpu_value[NUM_1] += (temp >> 16) & 0x3ff; /* get hight 16 bits */ in get_hpm_value()
[all …]
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| /third_party/uboot/u-boot-2020.01/board/hisilicon/hi3518ev300/ |
| D | hi3518ev300.c | 383 val[NUM_1] = readl(REG_BASE_GPIO0 + GPIO0_0_DATA_OFST); in is_auto_update()
388 if (val[NUM_0] == val[NUM_1] && val[NUM_1] == val[NUM_2] && val[NUM_0] == NUM_0) in is_auto_update()
413 target_dev = NUM_1; in select_upgrade_dev()
417 target_dev = NUM_1; in select_upgrade_dev()
435 auto_update_flag = NUM_1; in misc_init_r()
441 bare_chip_program = NUM_1; in misc_init_r()
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| /third_party/uboot/u-boot-2020.01/board/hisilicon/hi3516av300/ |
| D | hi3516av300.c | 283 val[NUM_1] = readl(REG_BASE_GPIO0 + GPIO0_0_DATA_OFST); in is_auto_update()
288 if (val[NUM_0] == val[NUM_1] && val[NUM_1] == val[NUM_2] && val[NUM_0] == NUM_0) in is_auto_update()
440 cmd = simple_strtoul(argv[NUM_1], NULL, 16); /* 16:base */ in start_other_cpus()
446 regval &= ~(NUM_1 << NUM_2); in start_other_cpus()
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| /third_party/uboot/u-boot-2020.01/board/hisilicon/hi3516cv500/ |
| D | hi3516cv500.c | 283 val[NUM_1] = readl(REG_BASE_GPIO0 + GPIO0_0_DATA_OFST); in is_auto_update()
288 if (val[NUM_0] == val[NUM_1] && val[NUM_1] == val[NUM_2] && val[NUM_0] == NUM_0) in is_auto_update()
439 cmd = simple_strtoul(argv[NUM_1], NULL, 16); /* 16:base */ in start_other_cpus()
445 regval &= ~(NUM_1 << NUM_2); in start_other_cpus()
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| /third_party/uboot/u-boot-2020.01/board/hisilicon/hi3519av100/ |
| D | hi3519av100_amp.c | 293 val[NUM_1] = readl(REG_BASE_GPIO4 + GPIO4_3_DATA_OFST); in is_auto_update()
298 if (val[NUM_0] == val[NUM_1] && val[NUM_1] == val[NUM_2] && val[NUM_0] == NUM_0) in is_auto_update()
357 static struct boot_medium_interface boot_intf[NUM_1] = {0};
412 target_dev = NUM_1; in select_upgrade_dev()
416 target_dev = NUM_1; in select_upgrade_dev()
827 addr = simple_strtoul(argv[NUM_1], NULL, 16); /* 16:base */ in start_a53cpu1()
837 addr = simple_strtoul(argv[NUM_1], NULL, 16); /* 16:base */ in start_a53cpu1()
888 addr = simple_strtoul(argv[NUM_1], NULL, 16); /* 16:base */ in start_a53cpu1()
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| D | hi3519av100.c | 271 val[NUM_1] = readl(REG_BASE_GPIO4 + GPIO4_3_DATA_OFST); in is_auto_update()
276 if (val[NUM_0] == val[NUM_1] && val[NUM_1] == val[NUM_2] && val[NUM_0] == NUM_0) in is_auto_update()
635 addr = simple_strtoul(argv[NUM_1], NULL, 16); /* 16:base */ in start_a53cpu1()
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| /third_party/uboot/u-boot-2020.01/board/hisilicon/hi3556av100/ |
| D | hi3556av100.c | 293 val[NUM_1] = readl(REG_BASE_GPIO4 + GPIO4_3_DATA_OFST); in is_auto_update()
298 if (val[NUM_0] == val[NUM_1] && val[NUM_1] == val[NUM_2] && val[NUM_0] == NUM_0) in is_auto_update()
356 static struct boot_medium_interface boot_intf[NUM_1] = {0};
411 target_dev = NUM_1; in select_upgrade_dev()
415 target_dev = NUM_1; in select_upgrade_dev()
828 addr = simple_strtoul(argv[NUM_1], NULL, 16); /* 16:base */ in start_a53cpu1()
838 addr = simple_strtoul(argv[NUM_1], NULL, 16); /* 16:base */ in start_a53cpu1()
891 addr = simple_strtoul(argv[NUM_1], NULL, 16); /* 16:base */ in start_a53cpu1()
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| /third_party/uboot/u-boot-2020.01/board/hisilicon/hi3559av100/ |
| D | hi3559av100.c | 282 val[NUM_1] = readl(REG_BASE_GPIO0 + GPIO0_0_DATA_OFST); in is_auto_update()
287 if (val[NUM_0] == val[NUM_1] && val[NUM_1] == val[NUM_2] && val[NUM_0] == NUM_0) in is_auto_update()
550 addr = simple_strtoul(argv[NUM_1], NULL, 16); /* 16:base */ in start_a53up()
611 src = simple_strtoul(argv[NUM_1], NULL, 16); /* 16:base */ in do_ugzip()
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| /third_party/uboot/u-boot-2020.01/board/hisilicon/hi3516ev300/ |
| D | hi3516ev300.c | 283 val[NUM_1] = readl(REG_BASE_GPIO0 + GPIO0_0_DATA_OFST); in is_auto_update()
288 if (val[NUM_0] == val[NUM_1] && val[NUM_1] == val[NUM_2] && val[NUM_0] == NUM_0) in is_auto_update()
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| /third_party/uboot/u-boot-2020.01/board/hisilicon/hi3516dv200/ |
| D | hi3516dv200.c | 283 val[NUM_1] = readl(REG_BASE_GPIO0 + GPIO0_0_DATA_OFST); in is_auto_update()
288 if (val[NUM_0] == val[NUM_1] && val[NUM_1] == val[NUM_2] && val[NUM_0] == NUM_0) in is_auto_update()
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| /third_party/uboot/u-boot-2020.01/arch/arm/cpu/armv7/hi3518ev300/ |
| D | pll_trainning.c | 439 regulator->steps[NUM_1] = regulator->curr + step_25; in svb_voltage_regulator_init()
441 regulator->steps[NUM_1] = regulator->max; in svb_voltage_regulator_init()
477 if (regulator->steps[NUM_0] <= regulator->steps[NUM_1]) in svb_voltage_regulator_init()
480 if (regulator->steps[NUM_1] <= regulator->steps[NUM_2]) in svb_voltage_regulator_init()
481 regulator->steps[NUM_1] = 0xffffffff; in svb_voltage_regulator_init()
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| /third_party/uboot/u-boot-2020.01/arch/arm/cpu/armv7/hi3516ev200/ |
| D | pll_trainning.c | 431 regulator->steps[NUM_1] = regulator->curr + step_25; in svb_voltage_regulator_init()
433 regulator->steps[NUM_1] = regulator->max; in svb_voltage_regulator_init()
469 if (regulator->steps[NUM_0] <= regulator->steps[NUM_1]) in svb_voltage_regulator_init()
472 if (regulator->steps[NUM_1] <= regulator->steps[NUM_2]) in svb_voltage_regulator_init()
473 regulator->steps[NUM_1] = 0xffffffff; in svb_voltage_regulator_init()
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| D | lowlevel_init_v300.c | 160 core_value[NUM_1] = 0; in get_hpm_value()
168 core_value[NUM_1] += (temp >> 16) & 0x3ff; /* get hight 16 bits */ in get_hpm_value()
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| /third_party/uboot/u-boot-2020.01/board/hisilicon/hi3516dv300/ |
| D | hi3516dv300.c | 366 val[NUM_1] = readl(REG_BASE_GPIO0 + GPIO0_0_DATA_OFST); in is_auto_update()
371 if (val[NUM_0] == val[NUM_1] && val[NUM_1] == val[NUM_2] && val[NUM_0] == NUM_0) in is_auto_update()
842 cmd = simple_strtoul(argv[NUM_1], NULL, 16); /* 16:base */ in start_other_cpus()
848 regval &= ~(NUM_1 << NUM_2); in start_other_cpus()
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| /third_party/uboot/u-boot-2020.01/arch/arm/cpu/armv7/hi3516ev300/ |
| D | pll_trainning.c | 458 regulator->steps[NUM_1] = regulator->curr + step_30; in svb_voltage_regulator_init()
460 regulator->steps[NUM_1] = regulator->max; in svb_voltage_regulator_init()
496 if (regulator->steps[NUM_0] <= regulator->steps[NUM_1]) in svb_voltage_regulator_init()
499 if (regulator->steps[NUM_1] <= regulator->steps[NUM_2]) in svb_voltage_regulator_init()
500 regulator->steps[NUM_1] = 0xffffffff; in svb_voltage_regulator_init()
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| D | lowlevel_init_v300.c | 156 core_value[NUM_1] = 0; in get_hpm_value()
164 core_value[NUM_1] += (temp >> 16) & 0x3ff; /* get hight 16 bits */ in get_hpm_value()
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| /third_party/uboot/u-boot-2020.01/arch/arm/cpu/armv7/hi3516cv500/ |
| D | pll_trainning.c | 496 regulator->steps[NUM_1] = regulator->curr + step_30; in svb_voltage_regulator_init()
498 regulator->steps[NUM_1] = regulator->max; in svb_voltage_regulator_init()
518 if (regulator->steps[NUM_0] <= regulator->steps[NUM_1]) in svb_voltage_regulator_init()
521 if (regulator->steps[NUM_1] <= regulator->steps[NUM_2]) in svb_voltage_regulator_init()
522 regulator->steps[NUM_1] = 0xffffffff; in svb_voltage_regulator_init()
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| /third_party/uboot/u-boot-2020.01/arch/arm/cpu/armv7/hi3516dv200/ |
| D | pll_trainning.c | 458 regulator->steps[NUM_1] = regulator->curr + step_30; in svb_voltage_regulator_init()
460 regulator->steps[NUM_1] = regulator->max; in svb_voltage_regulator_init()
496 if (regulator->steps[NUM_0] <= regulator->steps[NUM_1]) in svb_voltage_regulator_init()
499 if (regulator->steps[NUM_1] <= regulator->steps[NUM_2]) in svb_voltage_regulator_init()
500 regulator->steps[NUM_1] = 0xffffffff; in svb_voltage_regulator_init()
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| /third_party/uboot/u-boot-2020.01/arch/arm/cpu/armv7/hi3516dv300/ |
| D | pll_trainning.c | 495 regulator->steps[NUM_1] = regulator->curr + step_30; in svb_voltage_regulator_init()
497 regulator->steps[NUM_1] = regulator->max; in svb_voltage_regulator_init()
517 if (regulator->steps[NUM_0] <= regulator->steps[NUM_1]) in svb_voltage_regulator_init()
520 if (regulator->steps[NUM_1] <= regulator->steps[NUM_2]) in svb_voltage_regulator_init()
521 regulator->steps[NUM_1] = 0xffffffff; in svb_voltage_regulator_init()
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| /third_party/uboot/u-boot-2020.01/arch/arm/cpu/armv7/hi3516av300/ |
| D | pll_trainning.c | 495 regulator->steps[NUM_1] = regulator->curr + step_30; in svb_voltage_regulator_init()
497 regulator->steps[NUM_1] = regulator->max; in svb_voltage_regulator_init()
517 if (regulator->steps[NUM_0] <= regulator->steps[NUM_1]) in svb_voltage_regulator_init()
520 if (regulator->steps[NUM_1] <= regulator->steps[NUM_2]) in svb_voltage_regulator_init()
521 regulator->steps[NUM_1] = 0xffffffff; in svb_voltage_regulator_init()
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| /third_party/uboot/u-boot-2020.01/board/hisilicon/hi3516ev200/ |
| D | hi3516ev200.c | 371 val[NUM_1] = readl(REG_BASE_GPIO0 + GPIO0_0_DATA_OFST); in is_auto_update()
376 if (val[NUM_0] == val[NUM_1] && val[NUM_1] == val[NUM_2] && val[NUM_0] == NUM_0) in is_auto_update()
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| /third_party/uboot/u-boot-2020.01/arch/arm/cpu/armv7/hi3556av100/ |
| D | hisvb.c | 121 cpu_value[NUM_1] += (temp >> 16) & mask; /* get hight 16 bits */ in get_hpm_value()
129 mda_value[NUM_1] += (temp >> 16) & mask; /* get hight 16 bits */ in get_hpm_value()
137 core_value[NUM_1] += (temp >> 16) & mask; /* get hight 16 bits */ in get_hpm_value()
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| D | hisvb.h | 38 #define NUM_1 1 macro
|