| /external/mesa3d/src/gallium/drivers/radeon/ |
| D | r600_texture.c | 40 struct r600_texture *rtex);
182 struct r600_texture *rtex, unsigned level, in r600_texture_get_offset() argument
188 *stride = rtex->surface.u.gfx9.surf_pitch * rtex->surface.bpe; in r600_texture_get_offset()
189 *layer_stride = rtex->surface.u.gfx9.surf_slice_size; in r600_texture_get_offset()
196 return box->z * rtex->surface.u.gfx9.surf_slice_size + in r600_texture_get_offset()
197 rtex->surface.u.gfx9.offset[level] + in r600_texture_get_offset()
198 (box->y / rtex->surface.blk_h * in r600_texture_get_offset()
199 rtex->surface.u.gfx9.surf_pitch + in r600_texture_get_offset()
200 box->x / rtex->surface.blk_w) * rtex->surface.bpe; in r600_texture_get_offset()
202 *stride = rtex->surface.u.legacy.level[level].nblk_x * in r600_texture_get_offset()
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| D | r600_pipe_common.h | 496 struct r600_texture *rtex);
596 struct r600_texture *rtex,
600 struct r600_texture *rtex,
606 struct r600_texture *rtex, struct u_log_context *log);
633 struct r600_texture *rtex);
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| D | r600_buffer_common.c | 106 struct r600_texture *rtex = (struct r600_texture*)res; in si_init_resource_fields() local
161 if ((res->b.b.target != PIPE_BUFFER && !rtex->surface.is_linear) || in si_init_resource_fields()
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| /external/mesa3d/src/gallium/drivers/r600/ |
| D | r600_texture.c | 40 struct r600_texture *rtex);
174 struct r600_texture *rtex, unsigned level, in r600_texture_get_offset() argument
179 *stride = rtex->surface.u.legacy.level[level].nblk_x * in r600_texture_get_offset()
180 rtex->surface.bpe; in r600_texture_get_offset()
181 assert((uint64_t)rtex->surface.u.legacy.level[level].slice_size_dw * 4 <= UINT_MAX); in r600_texture_get_offset()
182 *layer_stride = (uint64_t)rtex->surface.u.legacy.level[level].slice_size_dw * 4; in r600_texture_get_offset()
185 return rtex->surface.u.legacy.level[level].offset; in r600_texture_get_offset()
189 return rtex->surface.u.legacy.level[level].offset + in r600_texture_get_offset()
190 box->z * (uint64_t)rtex->surface.u.legacy.level[level].slice_size_dw * 4 + in r600_texture_get_offset()
191 (box->y / rtex->surface.blk_h * in r600_texture_get_offset()
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| D | r600_blit.c | 334 struct r600_texture *rtex, in r600_blit_decompress_color() argument
341 if (!rtex->dirty_level_mask) in r600_blit_decompress_color()
345 if (!(rtex->dirty_level_mask & (1 << level))) in r600_blit_decompress_color()
350 max_layer = util_max_layer(&rtex->resource.b.b, level); in r600_blit_decompress_color()
356 surf_tmpl.format = rtex->resource.b.b.format; in r600_blit_decompress_color()
360 cbsurf = ctx->create_surface(ctx, &rtex->resource.b.b, &surf_tmpl); in r600_blit_decompress_color()
364 rtex->fmask.size ? rctx->custom_blend_decompress : rctx->custom_blend_fastclear); in r600_blit_decompress_color()
373 rtex->dirty_level_mask &= ~(1 << level); in r600_blit_decompress_color()
437 struct r600_texture *rtex = (struct r600_texture*)tex; in r600_decompress_subresource() local
439 if (rtex->db_compatible) { in r600_decompress_subresource()
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| D | evergreen_state.c | 172 static unsigned r600_tex_dim(struct r600_texture *rtex, in r600_tex_dim() argument
175 unsigned res_target = rtex->resource.b.b.target; in r600_tex_dim()
1100 struct r600_texture *rtex, in evergreen_set_color_surface_common() argument
1115 color->offset = rtex->surface.u.legacy.level[level].offset; in evergreen_set_color_surface_common()
1119 color->offset += rtex->resource.gpu_address; in evergreen_set_color_surface_common()
1123 pitch = (rtex->surface.u.legacy.level[level].nblk_x) / 8 - 1; in evergreen_set_color_surface_common()
1124 …slice = (rtex->surface.u.legacy.level[level].nblk_x * rtex->surface.u.legacy.level[level].nblk_y) … in evergreen_set_color_surface_common()
1130 switch (rtex->surface.u.legacy.level[level].mode) { in evergreen_set_color_surface_common()
1138 non_disp_tiling = rtex->non_disp_tiling; in evergreen_set_color_surface_common()
1142 non_disp_tiling = rtex->non_disp_tiling; in evergreen_set_color_surface_common()
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| D | r600_state.c | 811 struct r600_texture *rtex = (struct r600_texture*)surf->base.texture; in r600_init_color_surface() local
822 if (rtex->db_compatible && !r600_can_sample_zs(rtex, false)) { in r600_init_color_surface()
824 rtex = rtex->flushed_depth_texture; in r600_init_color_surface()
825 assert(rtex); in r600_init_color_surface()
828 offset = rtex->surface.u.legacy.level[level].offset; in r600_init_color_surface()
832 pitch = rtex->surface.u.legacy.level[level].nblk_x / 8 - 1; in r600_init_color_surface()
833 …slice = (rtex->surface.u.legacy.level[level].nblk_x * rtex->surface.u.legacy.level[level].nblk_y) … in r600_init_color_surface()
838 switch (rtex->surface.u.legacy.level[level].mode) { in r600_init_color_surface()
877 do_endian_swap = !rtex->db_compatible; in r600_init_color_surface()
956 r600_resource_reference(&surf->cb_buffer_cmask, &rtex->resource); in r600_init_color_surface()
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| D | r600_pipe_common.h | 415 struct r600_texture *rtex,
419 struct r600_texture *rtex,
754 struct r600_texture *rtex,
758 struct r600_texture *rtex,
764 struct r600_texture *rtex, struct u_log_context *log);
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| D | r600_state_common.c | 654 struct r600_texture *rtex = in r600_set_sampler_views() local
658 if (!is_buffer && rtex->db_compatible) { in r600_set_sampler_views()
665 if (!is_buffer && rtex->cmask.size) { in r600_set_sampler_views()
713 struct r600_texture *rtex = (struct r600_texture *)res; in r600_update_compressed_colortex_mask() local
715 if (rtex->cmask.size) { in r600_update_compressed_colortex_mask()
765 struct r600_texture *rtex = (struct r600_texture *)res; in r600_update_compressed_colortex_mask_images() local
767 if (rtex->cmask.size) { in r600_update_compressed_colortex_mask_images()
2273 struct r600_texture *rtex = (struct r600_texture *)surf->texture; in r600_draw_vbo() local
2275 rtex->dirty_level_mask |= 1 << surf->u.tex.level; in r600_draw_vbo()
2277 if (rtex->surface.has_stencil) in r600_draw_vbo()
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| D | r600_buffer_common.c | 108 struct r600_texture *rtex = (struct r600_texture*)res; in r600_init_resource_fields() local
163 if ((res->b.b.target != PIPE_BUFFER && !rtex->surface.is_linear) || in r600_init_resource_fields()
174 (rtex->surface.micro_tile_mode != RADEON_MICRO_MODE_DISPLAY && in r600_init_resource_fields()
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| /external/mesa3d/src/gallium/drivers/radeonsi/ |
| D | si_clear.c | 37 struct r600_texture *rtex) in si_alloc_separate_cmask() argument
39 if (rtex->cmask_buffer) in si_alloc_separate_cmask()
42 assert(rtex->cmask.size == 0); in si_alloc_separate_cmask()
44 si_texture_get_cmask_info(sscreen, rtex, &rtex->cmask); in si_alloc_separate_cmask()
45 if (!rtex->cmask.size) in si_alloc_separate_cmask()
48 rtex->cmask_buffer = (struct r600_resource *) in si_alloc_separate_cmask()
52 rtex->cmask.size, in si_alloc_separate_cmask()
53 rtex->cmask.alignment); in si_alloc_separate_cmask()
54 if (rtex->cmask_buffer == NULL) { in si_alloc_separate_cmask()
55 rtex->cmask.size = 0; in si_alloc_separate_cmask()
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| D | si_blit.c | 444 struct r600_texture *rtex, in si_blit_decompress_color() argument
456 level_mask &= rtex->dirty_level_mask; in si_blit_decompress_color()
469 assert(rtex->dcc_offset); in si_blit_decompress_color()
473 if (!vi_dcc_enabled(rtex, i)) in si_blit_decompress_color()
476 } else if (rtex->fmask.size) { in si_blit_decompress_color()
489 max_layer = util_max_layer(&rtex->resource.b.b, level); in si_blit_decompress_color()
495 surf_tmpl.format = rtex->resource.b.b.format; in si_blit_decompress_color()
499 cbsurf = ctx->create_surface(ctx, &rtex->resource.b.b, &surf_tmpl); in si_blit_decompress_color()
520 rtex->dirty_level_mask &= ~(1 << level); in si_blit_decompress_color()
525 si_make_CB_shader_coherent(sctx, rtex->resource.b.b.nr_samples, in si_blit_decompress_color()
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| D | si_state.c | 1917 static unsigned si_tex_dim(struct si_screen *sscreen, struct r600_texture *rtex, in si_tex_dim() argument
1920 unsigned res_target = rtex->resource.b.b.target; in si_tex_dim()
1934 rtex->surface.u.gfx9.resource_type == RADEON_RESOURCE_2D) { in si_tex_dim()
2349 struct r600_texture *rtex = (struct r600_texture*)surf->base.texture; in si_initialize_color_surface() local
2435 if (rtex->resource.b.b.nr_samples > 1) { in si_initialize_color_surface()
2436 unsigned log_samples = util_logbase2(rtex->resource.b.b.nr_samples); in si_initialize_color_surface()
2441 if (rtex->fmask.size) { in si_initialize_color_surface()
2443 unsigned fmask_bankh = util_logbase2(rtex->fmask.bank_height); in si_initialize_color_surface()
2463 if (rtex->resource.b.b.nr_samples > 1) { in si_initialize_color_surface()
2464 if (rtex->surface.bpe == 1) in si_initialize_color_surface()
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| D | si_descriptors.c | 242 struct r600_texture *rtex; in si_sampler_view_add_buffer() local
266 rtex = (struct r600_texture*)resource; in si_sampler_view_add_buffer()
267 if (rtex->dcc_separate_buffer) { in si_sampler_view_add_buffer()
269 rtex->dcc_separate_buffer, usage, in si_sampler_view_add_buffer()
431 struct r600_texture *rtex = (struct r600_texture *)view->texture; in si_set_sampler_view_desc() local
432 bool is_buffer = rtex->resource.b.b.target == PIPE_BUFFER; in si_set_sampler_view_desc()
435 if (vi_dcc_enabled(rtex, view->u.tex.first_level)) in si_set_sampler_view_desc()
436 if (!si_texture_disable_dcc(&sctx->b, rtex)) in si_set_sampler_view_desc()
437 sctx->b.decompress_dcc(&sctx->b.b, rtex); in si_set_sampler_view_desc()
442 assert(rtex); /* views with texture == NULL aren't supported */ in si_set_sampler_view_desc()
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| D | si_state_binning.c | 78 struct r600_texture *rtex = in si_get_color_bin_size() local
80 sum += rtex->surface.bpe; in si_get_color_bin_size()
203 struct r600_texture *rtex = in si_get_depth_bin_size() local
206 unsigned stencil_coeff = rtex->surface.has_stencil && in si_get_depth_bin_size()
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| D | si_state.h | 439 si_tile_mode_index(struct r600_texture *rtex, unsigned level, bool stencil) in si_tile_mode_index() argument
442 return rtex->surface.u.legacy.stencil_tiling_index[level]; in si_tile_mode_index()
444 return rtex->surface.u.legacy.tiling_index[level]; in si_tile_mode_index()
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| D | si_debug.c | 534 struct r600_texture *rtex; in si_dump_framebuffer() local
541 rtex = (struct r600_texture*)state->cbufs[i]->texture; in si_dump_framebuffer()
543 si_print_texture_info(sctx->b.screen, rtex, log); in si_dump_framebuffer()
548 rtex = (struct r600_texture*)state->zsbuf->texture; in si_dump_framebuffer()
550 si_print_texture_info(sctx->b.screen, rtex, log); in si_dump_framebuffer()
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| D | si_pipe.h | 658 struct r600_texture *rtex,
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| /external/mesa3d/src/gallium/drivers/r300/ |
| D | r300_state.c | 840 struct r300_resource *rtex = r300_resource(tex); in r300_print_fb_surf_info() local
853 rtex->tex.macrotile[0] ? "YES" : " NO", in r300_print_fb_surf_info()
854 rtex->tex.microtile ? "YES" : " NO", in r300_print_fb_surf_info()
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