/external/u-boot/arch/arm/mach-tegra/tegra20/ |
D | warmboot_avp.c | 28 struct clk_rst_ctlr *clkrst = in wb_start() local 55 reg = readl(&clkrst->crc_rst_dev[TEGRA_DEV_U]); in wb_start() 57 writel(reg, &clkrst->crc_rst_dev[TEGRA_DEV_U]); in wb_start() 61 osc_ctrl.word = readl(&clkrst->crc_osc_ctrl); in wb_start() 64 writel(osc_ctrl.word, &clkrst->crc_osc_ctrl); in wb_start() 83 reg = readl(&clkrst->crc_rst_dev[TEGRA_DEV_L]); in wb_start() 85 writel(reg, &clkrst->crc_rst_dev[TEGRA_DEV_L]); in wb_start() 90 writel(reg, &clkrst->crc_cpu_cmplx_set); in wb_start() 103 writel(CCLK_PLLP_BURST_POLICY, &clkrst->crc_cclk_brst_pol); in wb_start() 108 writel(reg, &clkrst->crc_clk_cpu_cmplx); in wb_start() [all …]
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D | clock.c | 394 struct clk_rst_ctlr *clkrst = in clock_get_osc_freq() local 398 reg = readl(&clkrst->crc_osc_ctrl); in clock_get_osc_freq() 405 struct clk_rst_ctlr *clkrst = in get_periph_source_reg() local 412 return &clkrst->crc_clk_src[internal_id]; in get_periph_source_reg() 509 struct clk_rst_ctlr *clkrst = in clock_set_enable() local 511 u32 *clk = &clkrst->crc_clk_out_enb[PERIPH_REG(periph_id)]; in clock_set_enable() 526 struct clk_rst_ctlr *clkrst = in reset_set_enable() local 528 u32 *reset = &clkrst->crc_rst_dev[PERIPH_REG(periph_id)]; in reset_set_enable()
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/external/u-boot/arch/arm/mach-tegra/tegra114/ |
D | cpu.c | 21 struct clk_rst_ctlr *clkrst = (struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE; in enable_cpu_power_rail() local 47 clrbits_le32(&clkrst->crc_cpu_softrst_ctrl2, 0xFFF); in enable_cpu_power_rail() 48 setbits_le32(&clkrst->crc_cpu_softrst_ctrl2, 408); in enable_cpu_power_rail() 53 struct clk_rst_ctlr *clkrst = (struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE; in enable_cpu_clocks() local 61 reg = readl(&clkrst->crc_pll_simple[SIMPLE_PLLX].pll_base); in enable_cpu_clocks() 67 writel(CCLK_BURST_POLICY, &clkrst->crc_cclk_brst_pol); in enable_cpu_clocks() 68 writel(SUPER_CCLK_DIVIDER, &clkrst->crc_super_cclk_div); in enable_cpu_clocks() 78 struct clk_rst_ctlr *clkrst = (struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE; in remove_cpu_resets() local 83 reg = readl(&clkrst->crc_rst_cpulp_cmplx_clr); in remove_cpu_resets() 84 writel((reg | CLR_NONCPURESET), &clkrst->crc_rst_cpulp_cmplx_clr); in remove_cpu_resets() [all …]
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D | clock.c | 464 struct clk_rst_ctlr *clkrst = in clock_get_osc_freq() local 468 reg = readl(&clkrst->crc_osc_ctrl); in clock_get_osc_freq() 480 struct clk_rst_ctlr *clkrst = in get_periph_source_reg() local 486 return &clkrst->crc_clk_src[PERIPH_ID_CSI+1]; in get_periph_source_reg() 493 return &clkrst->crc_clk_src_vw[internal_id]; in get_periph_source_reg() 495 return &clkrst->crc_clk_src[internal_id]; in get_periph_source_reg() 576 struct clk_rst_ctlr *clkrst = in clock_set_enable() local 584 clk = &clkrst->crc_clk_out_enb[PERIPH_REG(periph_id)]; in clock_set_enable() 586 clk = &clkrst->crc_clk_out_enb_vw[PERIPH_REG(periph_id)]; in clock_set_enable() 597 struct clk_rst_ctlr *clkrst = in reset_set_enable() local [all …]
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/external/u-boot/arch/arm/mach-tegra/tegra124/ |
D | cpu.c | 46 struct clk_rst_ctlr *clkrst = (struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE; in enable_cpu_clocks() local 54 reg = readl(&clkrst->crc_pll_simple[SIMPLE_PLLX].pll_base); in enable_cpu_clocks() 63 writel(CCLK_BURST_POLICY, &clkrst->crc_cclk_brst_pol); in enable_cpu_clocks() 64 writel(SUPER_CCLK_DIVIDER, &clkrst->crc_super_cclk_div); in enable_cpu_clocks() 70 writel(reg, &clkrst->crc_clk_cpu_cmplx_clr); in enable_cpu_clocks() 83 struct clk_rst_ctlr *clkrst = (struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE; in remove_cpu_resets() local 90 writel(reg, &clkrst->crc_rst_cpulp_cmplx_clr); in remove_cpu_resets() 91 writel(reg, &clkrst->crc_rst_cpug_cmplx_clr); in remove_cpu_resets() 96 writel(reg, &clkrst->crc_rst_cpulp_cmplx_clr); in remove_cpu_resets() 104 writel(reg, &clkrst->crc_rst_cpug_cmplx_clr); in remove_cpu_resets() [all …]
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D | clock.c | 606 struct clk_rst_ctlr *clkrst = in clock_get_osc_freq() local 610 reg = readl(&clkrst->crc_osc_ctrl); in clock_get_osc_freq() 622 struct clk_rst_ctlr *clkrst = in get_periph_source_reg() local 628 return &clkrst->crc_clk_src[PERIPH_ID_CSI+1]; in get_periph_source_reg() 635 return &clkrst->crc_clk_src_x[internal_id]; in get_periph_source_reg() 638 return &clkrst->crc_clk_src_vw[internal_id]; in get_periph_source_reg() 640 return &clkrst->crc_clk_src[internal_id]; in get_periph_source_reg() 722 struct clk_rst_ctlr *clkrst = in clock_set_enable() local 730 clk = &clkrst->crc_clk_out_enb[PERIPH_REG(periph_id)]; in clock_set_enable() 732 clk = &clkrst->crc_clk_out_enb_vw[PERIPH_REG(periph_id)]; in clock_set_enable() [all …]
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/external/u-boot/arch/arm/mach-tegra/ |
D | cpu.c | 156 struct clk_rst_ctlr *clkrst = (struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE; in pllx_set_iddq() local 161 reg = readl(&clkrst->crc_pllx_misc3); in pllx_set_iddq() 163 writel(reg, &clkrst->crc_pllx_misc3); in pllx_set_iddq() 166 readl(&clkrst->crc_pllx_misc3)); in pllx_set_iddq() 230 struct clk_rst_ctlr *clkrst = (struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE; in init_pllx() local 231 struct clk_pll_simple *pll = &clkrst->crc_pll_simple[SIMPLE_PLLX]; in init_pllx() 260 struct clk_rst_ctlr *clkrst = (struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE; in enable_cpu_clock() local 279 writel(CCLK_BURST_POLICY, &clkrst->crc_cclk_brst_pol); in enable_cpu_clock() 280 writel(SUPER_CCLK_DIVIDER, &clkrst->crc_super_cclk_div); in enable_cpu_clock() 287 clk = readl(&clkrst->crc_clk_cpu_cmplx); in enable_cpu_clock() [all …]
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D | clock.c | 62 struct clk_rst_ctlr *clkrst = in clock_get_osc_bypass() local 66 reg = readl(&clkrst->crc_osc_ctrl); in clock_get_osc_bypass() 73 struct clk_rst_ctlr *clkrst = in get_pll() local 81 return &clkrst->crc_pll[clkid]; in get_pll() 512 struct clk_rst_ctlr *clkrst = in reset_cmplx_set_enable() local 522 writel(mask, &clkrst->crc_cpu_cmplx_set); in reset_cmplx_set_enable() 524 writel(mask, &clkrst->crc_cpu_cmplx_clr); in reset_cmplx_set_enable() 724 struct clk_rst_ctlr *clkrst = in set_avp_clock_source() local 733 writel(val, &clkrst->crc_sclk_brst_pol); in set_avp_clock_source() 744 struct clk_rst_ctlr *clkrst = (struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE; in tegra30_set_up_pllp() local [all …]
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/external/u-boot/arch/arm/mach-tegra/tegra210/ |
D | clock.c | 675 struct clk_rst_ctlr *clkrst = in clock_get_osc_freq() local 679 reg = readl(&clkrst->crc_osc_ctrl); in clock_get_osc_freq() 701 struct clk_rst_ctlr *clkrst = in get_periph_source_reg() local 707 return &clkrst->crc_clk_src[PERIPH_ID_CSI+1]; in get_periph_source_reg() 715 return &clkrst->crc_clk_src[internal_id]; in get_periph_source_reg() 720 return &clkrst->crc_clk_src_vw[internal_id]; in get_periph_source_reg() 726 return &clkrst->crc_clk_src_x[internal_id]; in get_periph_source_reg() 731 return &clkrst->crc_clk_src_y[internal_id]; in get_periph_source_reg() 812 struct clk_rst_ctlr *clkrst = in clock_set_enable() local 820 clk = &clkrst->crc_clk_out_enb[PERIPH_REG(periph_id)]; in clock_set_enable() [all …]
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/external/u-boot/arch/arm/mach-tegra/tegra30/ |
D | clock.c | 444 struct clk_rst_ctlr *clkrst = in clock_get_osc_freq() local 448 reg = readl(&clkrst->crc_osc_ctrl); in clock_get_osc_freq() 460 struct clk_rst_ctlr *clkrst = in get_periph_source_reg() local 466 return &clkrst->crc_clk_src[PERIPH_ID_CSI+1]; in get_periph_source_reg() 473 return &clkrst->crc_clk_src_vw[internal_id]; in get_periph_source_reg() 475 return &clkrst->crc_clk_src[internal_id]; in get_periph_source_reg() 556 struct clk_rst_ctlr *clkrst = in clock_set_enable() local 564 clk = &clkrst->crc_clk_out_enb[PERIPH_REG(periph_id)]; in clock_set_enable() 566 clk = &clkrst->crc_clk_out_enb_vw[PERIPH_REG(periph_id)]; in clock_set_enable() 577 struct clk_rst_ctlr *clkrst = in reset_set_enable() local [all …]
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D | cpu.c | 86 struct clk_rst_ctlr *clkrst = in t30_init_clocks() local 95 writel(SUPER_SCLK_ENB_MASK, &clkrst->crc_super_sclk_div); in t30_init_clocks() 101 writel(val, &clkrst->crc_clk_sys_rate); in t30_init_clocks()
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/external/u-boot/drivers/usb/host/ |
D | ehci-tegra.c | 352 struct clk_rst_ctlr *clkrst; in init_utmi_usb_controller() local 409 clkrst = (struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE; in init_utmi_usb_controller() 411 val = readl(&clkrst->crc_utmip_pll_cfg2); in init_utmi_usb_controller() 418 writel(val, &clkrst->crc_utmip_pll_cfg2); in init_utmi_usb_controller() 421 val = readl(&clkrst->crc_utmip_pll_cfg1); in init_utmi_usb_controller() 428 writel(val, &clkrst->crc_utmip_pll_cfg1); in init_utmi_usb_controller() 431 clrbits_le32(&clkrst->crc_utmip_pll_cfg1, in init_utmi_usb_controller() 527 clrbits_le32(&clkrst->crc_utmip_pll_cfg2, in init_utmi_usb_controller() 530 clrbits_le32(&clkrst->crc_utmip_pll_cfg2, in init_utmi_usb_controller() 533 clrbits_le32(&clkrst->crc_utmip_pll_cfg2, in init_utmi_usb_controller()
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