| /external/u-boot/board/barco/platinum/ |
| D | platinum.h | 27 #define ECSPI_PAD_SS (PAD_CTL_SRE_SLOW | PAD_CTL_PUS_100K_UP | \
31 #define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
34 #define I2C_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
37 #define I2C_PAD_CTRL_SCL (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_LOW | \
41 #define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
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| /external/u-boot/board/tqc/tqma6/ |
| D | tqma6_mba6.c | 33 #define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
42 #define GPIO_OUT_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_LOW | \
45 #define GPIO_IN_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_LOW | \
48 #define SPI_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
51 #define I2C_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
72 #define ENET_TX_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_DSE_34ohm)
73 #define ENET_CLK_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_HIGH | \
75 #define ENET_MDIO_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
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| D | tqma6.c | 41 #define GPIO_OUT_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_LOW | \
44 #define GPIO_IN_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_LOW | \
47 #define SPI_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
50 #define I2C_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
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| D | tqma6_wru4.c | 38 PAD_CTL_PUS_100K_UP | \
140 PAD_CTL_PUS_100K_UP | \
191 PAD_CTL_PUS_100K_UP | \
200 PAD_CTL_PUS_100K_UP | \
|
| /external/u-boot/board/gateworks/gw_ventana/ |
| D | common.h | 19 PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
27 PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
34 #define I2C_PAD_CTRL (PAD_CTL_PUS_100K_UP | \
39 PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
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| /external/u-boot/board/liebherr/display5/ |
| D | common.h | 11 PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
27 PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
31 #define ENET_PAD_CTRL_CLK ((PAD_CTL_PUS_100K_UP & ~PAD_CTL_PKE) | \
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| /external/u-boot/arch/arm/include/asm/arch-mx25/ |
| D | iomux-mx25.h | 21 #define MX25_KPP_ROW_PAD_CTRL PAD_CTL_PUS_100K_UP
22 #define MX25_KPP_COL_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_ODE)
165 MX25_PAD_D10__USBOTG_OC = IOMUX_PAD(0x294, 0x09c, 0x06, 0x57c, 0, PAD_CTL_PUS_100K_UP),
173 MX25_PAD_D8__USBH2_OC = IOMUX_PAD(0x29c, 0x0a4, 0x06, 0x580, 0, PAD_CTL_PUS_100K_UP),
267 MX25_PAD_PWM__USBH2_OC = IOMUX_PAD(0x314, 0x11c, 0x06, 0x580, 1, PAD_CTL_PUS_100K_UP),
342 MX25_PAD_UART1_RTS__UART1_RTS = IOMUX_PAD(0x370, 0x178, 0x00, 0, 0, PAD_CTL_PUS_100K_UP),
346 MX25_PAD_UART1_CTS__UART1_CTS = IOMUX_PAD(0x374, 0x17c, 0x00, 0, 0, PAD_CTL_PUS_100K_UP),
412 MX25_PAD_KPP_COL0__AUD5_TXD = IOMUX_PAD(0x3b0, 0x1b8, 0x02, 0, 0, PAD_CTL_PUS_100K_UP),
417 MX25_PAD_KPP_COL1__AUD5_RXD = IOMUX_PAD(0x3b4, 0x1bc, 0x02, 0, 0, PAD_CTL_PUS_100K_UP),
422 MX25_PAD_KPP_COL2__AUD5_TXC = IOMUX_PAD(0x3b8, 0x1c0, 0x02, 0, 0, PAD_CTL_PUS_100K_UP),
[all …]
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| /external/u-boot/board/technexion/pico-imx6ul/ |
| D | pico-imx6ul.c | 29 PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
36 #define MDIO_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_PUE | \
39 #define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_PUE | \
45 #define LCD_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PUS_100K_UP | PAD_CTL_PUE | \
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| /external/u-boot/board/grinn/liteboard/ |
| D | board.c | 34 PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
41 #define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_PUE | \
45 #define MDIO_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_PUE | \
|
| /external/u-boot/board/bachmann/ot1200/ |
| D | ot1200.c | 33 #define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | \
40 #define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | OUTPUT_40OHM | \
46 #define I2C_PAD_CTRL (PAD_CTL_PUS_100K_UP | OUTPUT_40OHM | \
114 MX6_PAD_GPIO_19__GPIO4_IO05 | MUX_PAD_CTRL(PAD_CTL_PUS_100K_UP),
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| /external/u-boot/board/freescale/mx53ard/ |
| D | mx53ard.c | 54 PAD_CTL_PUS_100K_UP), in setup_iomux_nand()
60 PAD_CTL_PUS_100K_UP), in setup_iomux_nand()
103 PAD_CTL_PUS_100K_UP | PAD_CTL_ODE)
140 PAD_CTL_PUS_100K_UP)
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| /external/u-boot/board/ccv/xpress/ |
| D | xpress.c | 32 PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
40 PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
44 #define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_PUE | \
48 #define MDIO_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_PUE | \
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| /external/u-boot/board/phytec/pcl063/ |
| D | pcl063.c | 32 PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
93 #define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_PUE | \
97 #define MDIO_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_PUE | \
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| /external/u-boot/board/variscite/dart_6ul/ |
| D | dart_6ul.c | 30 #define GPMI_PAD_CTRL0 (PAD_CTL_PKE | PAD_CTL_PUE | PAD_CTL_PUS_100K_UP)
96 #define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_PUE | \
99 #define MDIO_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_PUE | \
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| /external/u-boot/board/phytec/pcm058/ |
| D | pcm058.c | 38 #define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | \
46 #define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | \
52 #define I2C_PAD_CTRL (PAD_CTL_PUS_100K_UP | \
58 #define ASRC_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PUS_100K_UP | \
61 #define NAND_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
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| /external/u-boot/board/kosagi/novena/ |
| D | novena_spl.c | 32 PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
42 PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
51 PAD_CTL_PUS_100K_UP | PAD_CTL_DSE_40ohm | PAD_CTL_HYS)
60 PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_LOW | \
66 PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
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| /external/u-boot/board/freescale/mx6ul_14x14_evk/ |
| D | mx6ul_14x14_evk.c | 36 PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
48 PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
52 #define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_PUE | \
56 #define LCD_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PUS_100K_UP | PAD_CTL_PUE | \
59 #define MDIO_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_PUE | \
|
| /external/u-boot/board/BuR/brppt2/ |
| D | board.c | 52 #define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | \
56 #define ENET_PAD_CTRL1 (PAD_CTL_PUS_100K_UP | \
60 #define ENET_PAD_CTRL_PU (PAD_CTL_PUS_100K_UP | \
64 #define ENET_PAD_CTRL_CLK ((PAD_CTL_PUS_100K_UP & ~PAD_CTL_PKE) | \
68 #define GPIO_PAD_CTRL_PU (PAD_CTL_PUS_100K_UP | \
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| /external/u-boot/arch/arm/include/asm/mach-imx/ |
| D | iomux-v3.h | 146 #define PAD_CTL_PUS_100K_UP (2 << 14 | PAD_CTL_PUE) macro
207 #define PAD_CTL_PUS_100K_UP (2 << 4 | PAD_CTL_PUE) macro
226 #define PAD_CTL_PUS_100K_UP (2 << 4 | PAD_CTL_PUE) macro
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| /external/u-boot/board/menlo/m53menlo/ |
| D | m53menlo.c | 145 PAD_CTL_PUS_100K_UP)
377 PAD_CTL_PUS_100K_UP | PAD_CTL_ODE)
418 PAD_CTL_PUS_100K_UP), in setup_iomux_nand()
420 PAD_CTL_PUS_100K_UP), in setup_iomux_nand()
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| /external/u-boot/board/freescale/mx6sxsabreauto/ |
| D | mx6sxsabreauto.c | 34 PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
37 #define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_PUE | \
47 #define GPMI_PAD_CTRL0 (PAD_CTL_PKE | PAD_CTL_PUE | PAD_CTL_PUS_100K_UP)
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| /external/u-boot/board/aristainetos/ |
| D | aristainetos.c | 37 #define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | \
45 #define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | \
51 #define I2C_PAD_CTRL (PAD_CTL_PUS_100K_UP | \
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| /external/u-boot/board/warp/ |
| D | warp.c | 32 #define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | \
43 PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
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| /external/u-boot/board/freescale/mx53smd/ |
| D | mx53smd.c | 44 PAD_CTL_PUS_100K_UP | PAD_CTL_ODE)
93 PAD_CTL_PUS_100K_UP)
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| /external/u-boot/board/freescale/mx25pdk/ |
| D | mx25pdk.c | 44 #define I2C_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PUS_100K_UP | \
96 #define UART1_IN_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PUS_100K_UP)
|