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Searched refs:ddr_type (Results 1 – 25 of 42) sorted by relevance

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/external/u-boot/drivers/ddr/marvell/a38x/
Dddr3_init.c9 static char *ddr_type = "DDR3"; variable
37 mv_ddr_pre_training_soc_config(ddr_type); in ddr3_init()
76 printf("%s Training Sequence - FAILED\n", ddr_type); in ddr3_init()
85 mv_ddr_post_training_soc_config(ddr_type); in ddr3_init()
136 printf("%s Training Sequence - FAILED\n", ddr_type); in mv_ddr_training_params_set()
Dmv_ddr_plat.h225 int mv_ddr_pre_training_soc_config(const char *ddr_type);
226 int mv_ddr_post_training_soc_config(const char *ddr_type);
Dmv_ddr_plat.c1104 static int ddr3_restore_and_set_final_windows(u32 *win, const char *ddr_type) in ddr3_restore_and_set_final_windows() argument
1118 ddr_type); in ddr3_restore_and_set_final_windows()
1212 int mv_ddr_pre_training_soc_config(const char *ddr_type) in mv_ddr_pre_training_soc_config() argument
1249 printf("%s Training Sequence - 2nd boot - Skip\n", ddr_type); in mv_ddr_pre_training_soc_config()
1322 int mv_ddr_post_training_soc_config(const char *ddr_type) in mv_ddr_post_training_soc_config() argument
1327 ddr3_restore_and_set_final_windows(win, ddr_type); in mv_ddr_post_training_soc_config()
/external/u-boot/arch/arm/mach-stm32mp/include/mach/
Dddr.h10 enum ddr_type { enum
16 int board_ddr_power_init(enum ddr_type ddr_type);
/external/arm-trusted-firmware/include/drivers/st/
Dstm32mp_pmic.h49 int pmic_ddr_power_init(enum ddr_type ddr_type);
/external/u-boot/board/st/stm32mp1/
Dboard.c41 int board_ddr_power_init(enum ddr_type ddr_type) in board_ddr_power_init() argument
53 switch (ddr_type) { in board_ddr_power_init()
/external/arm-trusted-firmware/drivers/st/pmic/
Dstm32mp_pmic.c250 int pmic_ddr_power_init(enum ddr_type ddr_type) argument
256 switch (ddr_type) {
/external/u-boot/board/rockchip/evb_rk3036/
Devb_rk3036.c15 config->ddr_type = 3; in get_ddr_config()
/external/u-boot/board/rockchip/kylin_rk3036/
Dkylin_rk3036.c17 config->ddr_type = 3; in get_ddr_config()
/external/u-boot/drivers/ram/
Dmpc83xx_sdram.c317 u32 dso, pz_override, nz_override, odt_term, ddr_type, mvref_sel, m_odr; in mpc83xx_sdram_probe() local
409 ddr_type = dev_read_u32_default(dev, "ddr_type", 0); in mpc83xx_sdram_probe()
410 if (ddr_type > 1) { in mpc83xx_sdram_probe()
412 dev->name, ddr_type); in mpc83xx_sdram_probe()
434 ddr_type << (31 - 13) | in mpc83xx_sdram_probe()
/external/u-boot/board/ccv/xpress/
Dspl.c61 .ddr_type = DDR_TYPE_DDR3,
/external/u-boot/board/barco/platinum/
Dspl_picon.c137 .ddr_type = DDR_TYPE_DDR3, in spl_dram_init()
Dspl_titanium.c140 .ddr_type = DDR_TYPE_DDR3, in spl_dram_init()
/external/u-boot/board/engicam/common/
Dspl.c234 .ddr_type = DDR_TYPE_DDR3,
346 .ddr_type = DDR_TYPE_DDR3,
/external/u-boot/arch/x86/include/asm/
Dglobal_data.h23 uint16_t ddr_type; member
/external/u-boot/arch/x86/include/asm/arch-quark/
Dmrc.h114 uint8_t ddr_type; /* DDR3, DDR3L */ member
/external/u-boot/board/freescale/mx6memcal/
Dspl.c232 .ddr_type = DDR_TYPE_DDR3,
237 .ddr_type = DDR_TYPE_LPDDR2,
/external/u-boot/arch/arm/mach-imx/mx6/
Dlitesom.c129 .ddr_type = DDR_TYPE_DDR3,
Dopos6ul.c131 .ddr_type = DDR_TYPE_DDR3,
/external/u-boot/board/freescale/mx6ul_14x14_evk/
Dmx6ul_14x14_evk.c592 .ddr_type = DDR_TYPE_LPDDR2,
632 .ddr_type = DDR_TYPE_DDR3,
/external/u-boot/board/phytec/pcl063/
Dspl.c67 .ddr_type = DDR_TYPE_DDR3,
/external/u-boot/board/k+p/kp_imx6q_tpc/
Dkp_imx6q_tpc_spl.c173 .ddr_type = DDR_TYPE_DDR3, in spl_dram_init()
/external/u-boot/doc/device-tree-bindings/ram/
Dfsl,mpc83xx-mem-controller.txt36 - ddr_type: Selects voltage level for DDR pads; possible
258 ddr_type = <DDR_TYPE_DDR2_1_8_VOLT>;
/external/arm-trusted-firmware/drivers/st/ddr/
Dstm32mp1_ddr.c701 static int board_ddr_power_init(enum ddr_type ddr_type) in board_ddr_power_init() argument
704 return pmic_ddr_power_init(ddr_type); in board_ddr_power_init()
/external/u-boot/arch/x86/cpu/quark/
Ddram.c83 mrc_params->ddr_type = fdtdec_get_int(blob, node, "dram-type", 0); in mrc_configure_params()

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