| /external/iproute2/lib/ |
| D | ll_map.c | 46 struct ll_cache *im in ll_get_by_index() local
48 if (im->index == index) in ll_get_by_index()
49 return im; in ll_get_by_index()
71 struct ll_cache *im in ll_get_by_name() local
74 if (strncmp(im->name, name, IFNAMSIZ) == 0) in ll_get_by_name()
75 return im; in ll_get_by_name()
87 struct ll_cache *im; in ll_remember_index() local
96 im = ll_get_by_index(ifi->ifi_index); in ll_remember_index()
98 if (im) { in ll_remember_index()
99 hlist_del(&im->name_hash); in ll_remember_index()
[all …]
|
| /external/u-boot/board/freescale/mpc8315erdb/ |
| D | sdram.c | 43 volatile immap_t *im = (volatile immap_t *)CONFIG_SYS_IMMR; in fixed_sdram() local
47 im->sysconf.ddrlaw[0].bar = CONFIG_SYS_SDRAM_BASE & 0xfffff000; in fixed_sdram()
48 im->sysconf.ddrlaw[0].ar = LBLAWAR_EN | (msize_log2 - 1); in fixed_sdram()
49 im->sysconf.ddrcdr = CONFIG_SYS_DDRCDR_VALUE; in fixed_sdram()
57 im->ddr.csbnds[0].csbnds = (msize - 1) >> 24; in fixed_sdram()
58 im->ddr.cs_config[0] = CONFIG_SYS_DDR_CS0_CONFIG; in fixed_sdram()
61 im->ddr.cs_config[1] = 0; in fixed_sdram()
63 im->ddr.sdram_clk_cntl = CONFIG_SYS_DDR_SDRAM_CLK_CNTL; in fixed_sdram()
64 im->ddr.timing_cfg_3 = CONFIG_SYS_DDR_TIMING_3; in fixed_sdram()
65 im->ddr.timing_cfg_1 = CONFIG_SYS_DDR_TIMING_1; in fixed_sdram()
[all …]
|
| /external/u-boot/board/freescale/mpc8313erdb/ |
| D | sdram.c | 47 volatile immap_t *im = (volatile immap_t *)CONFIG_SYS_IMMR; in fixed_sdram() local
50 im->sysconf.ddrlaw[0].bar = CONFIG_SYS_SDRAM_BASE & 0xfffff000; in fixed_sdram()
51 im->sysconf.ddrlaw[0].ar = LBLAWAR_EN | (msize_log2 - 1); in fixed_sdram()
52 im->sysconf.ddrcdr = CONFIG_SYS_DDRCDR_VALUE; in fixed_sdram()
63 im->ddr.csbnds[0].csbnds = in fixed_sdram()
67 im->ddr.cs_config[0] = CONFIG_SYS_DDR_CS0_CONFIG; in fixed_sdram()
70 im->ddr.cs_config[1] = 0; in fixed_sdram()
72 im->ddr.sdram_clk_cntl = CONFIG_SYS_DDR_CLK_CNTL; in fixed_sdram()
73 im->ddr.timing_cfg_3 = CONFIG_SYS_DDR_TIMING_3; in fixed_sdram()
74 im->ddr.timing_cfg_1 = CONFIG_SYS_DDR_TIMING_1; in fixed_sdram()
[all …]
|
| /external/u-boot/board/mpc8308_p1m/ |
| D | sdram.c | 27 immap_t *im = (immap_t *)CONFIG_SYS_IMMR; in fixed_sdram() local
31 out_be32(&im->sysconf.ddrlaw[0].bar, in fixed_sdram()
33 out_be32(&im->sysconf.ddrlaw[0].ar, LBLAWAR_EN | (msize_log2 - 1)); in fixed_sdram()
34 out_be32(&im->sysconf.ddrcdr, CONFIG_SYS_DDRCDR_VALUE); in fixed_sdram()
36 out_be32(&im->ddr.csbnds[0].csbnds, (msize - 1) >> 24); in fixed_sdram()
37 out_be32(&im->ddr.cs_config[0], CONFIG_SYS_DDR_CS0_CONFIG); in fixed_sdram()
40 out_be32(&im->ddr.cs_config[1], 0); in fixed_sdram()
42 out_be32(&im->ddr.sdram_clk_cntl, CONFIG_SYS_DDR_SDRAM_CLK_CNTL); in fixed_sdram()
43 out_be32(&im->ddr.timing_cfg_3, CONFIG_SYS_DDR_TIMING_3); in fixed_sdram()
44 out_be32(&im->ddr.timing_cfg_1, CONFIG_SYS_DDR_TIMING_1); in fixed_sdram()
[all …]
|
| /external/u-boot/board/freescale/mpc8308rdb/ |
| D | sdram.c | 31 immap_t *im = (immap_t *)CONFIG_SYS_IMMR; in fixed_sdram() local
35 out_be32(&im->sysconf.ddrlaw[0].bar, in fixed_sdram()
37 out_be32(&im->sysconf.ddrlaw[0].ar, LBLAWAR_EN | (msize_log2 - 1)); in fixed_sdram()
38 out_be32(&im->sysconf.ddrcdr, CONFIG_SYS_DDRCDR_VALUE); in fixed_sdram()
40 out_be32(&im->ddr.csbnds[0].csbnds, (msize - 1) >> 24); in fixed_sdram()
41 out_be32(&im->ddr.cs_config[0], CONFIG_SYS_DDR_CS0_CONFIG); in fixed_sdram()
44 out_be32(&im->ddr.cs_config[1], 0); in fixed_sdram()
46 out_be32(&im->ddr.sdram_clk_cntl, CONFIG_SYS_DDR_SDRAM_CLK_CNTL); in fixed_sdram()
47 out_be32(&im->ddr.timing_cfg_3, CONFIG_SYS_DDR_TIMING_3); in fixed_sdram()
48 out_be32(&im->ddr.timing_cfg_1, CONFIG_SYS_DDR_TIMING_1); in fixed_sdram()
[all …]
|
| /external/u-boot/board/gdsys/mpc8308/ |
| D | sdram.c | 34 immap_t *im = (immap_t *)CONFIG_SYS_IMMR; in fixed_sdram() local
38 out_be32(&im->sysconf.ddrlaw[0].bar, in fixed_sdram()
40 out_be32(&im->sysconf.ddrlaw[0].ar, LBLAWAR_EN | (msize_log2 - 1)); in fixed_sdram()
41 out_be32(&im->sysconf.ddrcdr, CONFIG_SYS_DDRCDR_VALUE); in fixed_sdram()
43 out_be32(&im->ddr.csbnds[0].csbnds, (msize - 1) >> 24); in fixed_sdram()
44 out_be32(&im->ddr.cs_config[0], CONFIG_SYS_DDR_CS0_CONFIG); in fixed_sdram()
47 out_be32(&im->ddr.cs_config[1], 0); in fixed_sdram()
49 out_be32(&im->ddr.sdram_clk_cntl, CONFIG_SYS_DDR_SDRAM_CLK_CNTL); in fixed_sdram()
50 out_be32(&im->ddr.timing_cfg_3, CONFIG_SYS_DDR_TIMING_3); in fixed_sdram()
51 out_be32(&im->ddr.timing_cfg_1, CONFIG_SYS_DDR_TIMING_1); in fixed_sdram()
[all …]
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| /external/u-boot/board/freescale/mpc8349emds/ |
| D | mpc8349emds.c | 52 volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR; in dram_init() local
55 if ((im->sysconf.immrbar & IMMRBAR_BASE_ADDR) != (u32)im) in dram_init()
59 im->sysconf.ddrlaw[0].bar = CONFIG_SYS_SDRAM_BASE & LAWBAR_BAR; in dram_init()
89 volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR; in fixed_sdram() local
94 im->sysconf.ddrlaw[0].bar = CONFIG_SYS_SDRAM_BASE & 0xfffff000; in fixed_sdram()
95 im->sysconf.ddrlaw[0].ar = LAWAR_EN | ((ddr_size_log2 - 1) & LAWAR_SIZE); in fixed_sdram()
101 im->ddr.csbnds[2].csbnds = CONFIG_SYS_DDR_CS2_BNDS; in fixed_sdram()
102 im->ddr.cs_config[2] = CONFIG_SYS_DDR_CS2_CONFIG; in fixed_sdram()
103 im->ddr.timing_cfg_0 = CONFIG_SYS_DDR_TIMING_0; in fixed_sdram()
104 im->ddr.timing_cfg_1 = CONFIG_SYS_DDR_TIMING_1; in fixed_sdram()
[all …]
|
| /external/python/cpython2/Demo/classes/ |
| D | Complex.py | 93 return obj.im
98 def __init__(self, re=0, im=0): argument
103 _im = re.im
106 if IsComplex(im):
107 _re = _re - im.im
108 _im = _im + im.re
110 _im = _im + im
120 if not self.im:
122 return hash((self.re, self.im))
125 if not self.im:
[all …]
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| /external/u-boot/board/freescale/mpc8349itx/ |
| D | mpc8349itx.c | 33 volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR; in fixed_sdram() local
38 im->sysconf.ddrlaw[0].ar = in fixed_sdram()
40 im->sysconf.ddrlaw[0].bar = CONFIG_SYS_SDRAM_BASE & 0xfffff000; in fixed_sdram()
45 im->ddr.csbnds[0].csbnds = in fixed_sdram()
49 im->ddr.cs_config[0] = CONFIG_SYS_DDR_CS0_CONFIG; in fixed_sdram()
52 im->ddr.cs_config[1] = 0; in fixed_sdram()
53 im->ddr.cs_config[2] = 0; in fixed_sdram()
54 im->ddr.cs_config[3] = 0; in fixed_sdram()
56 debug("cs0_bnds = 0x%08x\n", im->ddr.csbnds[0].csbnds); in fixed_sdram()
57 debug("cs0_config = 0x%08x\n", im->ddr.cs_config[0]); in fixed_sdram()
[all …]
|
| /external/u-boot/arch/powerpc/cpu/mpc83xx/ |
| D | cpu_init.c | 54 void cpu_init_f (volatile immap_t * im) in cpu_init_f() argument
139 clrsetbits_be32(&im->arbiter.acr, acr_mask, acr_val); in cpu_init_f()
141 clrsetbits_be32(&im->sysconf.spcr, spcr_mask, spcr_val); in cpu_init_f()
143 clrsetbits_be32(&im->clk.sccr, sccr_mask, sccr_val); in cpu_init_f()
146 gd->arch.reset_status = __raw_readl(&im->reset.rsr); in cpu_init_f()
147 __raw_writel(~(RSR_RES), &im->reset.rsr); in cpu_init_f()
150 gd->arch.arbiter_event_attributes = __raw_readl(&im->arbiter.aeatr); in cpu_init_f()
151 gd->arch.arbiter_event_address = __raw_readl(&im->arbiter.aeadr); in cpu_init_f()
157 __raw_writel(RMR_CSRE & (1<<RMR_CSRE_SHIFT), &im->reset.rmr); in cpu_init_f()
162 clrsetbits_be32(&im->im_lbc.lcrr, lcrr_mask, lcrr_val); in cpu_init_f()
[all …]
|
| D | spl_minimal.c | 21 void cpu_init_f (volatile immap_t * im) in cpu_init_f() argument
32 im->arbiter.acr = (im->arbiter.acr & ~ACR_PIPE_DEP) | in cpu_init_f()
38 im->arbiter.acr = (im->arbiter.acr & ~(ACR_RPTCNT)) | in cpu_init_f()
44 im->sysconf.spcr = (im->sysconf.spcr & ~SPCR_OPT) | in cpu_init_f()
49 im->sysconf.spcr |= SPCR_TBEN; in cpu_init_f()
53 im->sysconf.ddrcdr = CONFIG_SYS_DDRCDR; in cpu_init_f()
57 im->sysconf.obir = CONFIG_SYS_OBIR; in cpu_init_f()
75 im->sysconf.lblaw[0].bar = CONFIG_SYS_NAND_LBLAWBAR_PRELIM; in cpu_init_f()
76 im->sysconf.lblaw[0].ar = CONFIG_SYS_NAND_LBLAWAR_PRELIM; in cpu_init_f()
98 volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR; in get_bus_freq() local
[all …]
|
| /external/icu/icu4c/source/data/locales/ |
| D | mgo.txt | 187 "iməg ngwə̀t",
188 "iməg fog",
189 "iməg ichiibɔd",
190 "iməg àdùmbə̀ŋ",
191 "iməg ichika",
192 "iməg kud",
193 "iməg tèsiʼe",
194 "iməg zò",
195 "iməg krizmed",
212 "iməg mbegtug",
[all …]
|
| /external/u-boot/board/ve8313/ |
| D | ve8313.c | 38 volatile immap_t *im = (volatile immap_t *)CONFIG_SYS_IMMR; in fixed_sdram() local
41 out_be32(&im->sysconf.ddrlaw[0].bar, in fixed_sdram()
43 out_be32(&im->sysconf.ddrlaw[0].ar, (LBLAWAR_EN | (msize_log2 - 1))); in fixed_sdram()
44 out_be32(&im->sysconf.ddrcdr, CONFIG_SYS_DDRCDR_VALUE); in fixed_sdram()
55 out_be32(&im->ddr.csbnds[0].csbnds, in fixed_sdram()
59 out_be32(&im->ddr.cs_config[0], CONFIG_SYS_DDR_CS0_CONFIG); in fixed_sdram()
62 out_be32(&im->ddr.cs_config[1], 0); in fixed_sdram()
64 out_be32(&im->ddr.sdram_clk_cntl, CONFIG_SYS_DDR_CLK_CNTL); in fixed_sdram()
65 out_be32(&im->ddr.timing_cfg_3, CONFIG_SYS_DDR_TIMING_3); in fixed_sdram()
66 out_be32(&im->ddr.timing_cfg_1, CONFIG_SYS_DDR_TIMING_1); in fixed_sdram()
[all …]
|
| /external/u-boot/drivers/gpio/ |
| D | mpc83xx_gpio.c | 53 immap_t *im = (immap_t *)CONFIG_SYS_IMMR; in gpio_direction_input() local
65 clrbits_be32(&im->gpio[ctrlr].dir, line_mask); in gpio_direction_input()
73 immap_t *im = (immap_t *)CONFIG_SYS_IMMR; in gpio_direction_output() local
93 setbits_be32(&im->gpio[ctrlr].dir, line_mask); in gpio_direction_output()
101 immap_t *im = (immap_t *)CONFIG_SYS_IMMR; in gpio_get_value() local
114 return (in_be32(&im->gpio[ctrlr].dat) & line_mask) != 0; in gpio_get_value()
120 immap_t *im = (immap_t *)CONFIG_SYS_IMMR; in gpio_set_value() local
143 out_be32(&im->gpio[ctrlr].dat, gpio_output_value[ctrlr]); in gpio_set_value()
151 immap_t *im = (immap_t *)CONFIG_SYS_IMMR; in mpc83xx_gpio_init_f() local
154 out_be32(&im->gpio[0].dir, CONFIG_MPC83XX_GPIO_0_INIT_DIRECTION); in mpc83xx_gpio_init_f()
[all …]
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| /external/u-boot/board/freescale/mpc832xemds/ |
| D | mpc832xemds.c | 95 volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR; in dram_init() local
98 if ((im->sysconf.immrbar & IMMRBAR_BASE_ADDR) != (u32) im) in dram_init()
102 im->sysconf.ddrlaw[0].bar = CONFIG_SYS_SDRAM_BASE & LAWBAR_BAR; in dram_init()
117 volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR; in fixed_sdram() local
129 im->sysconf.ddrlaw[0].ar = in fixed_sdram()
134 im->ddr.sdram_clk_cntl = CONFIG_SYS_DDR_CLK_CNTL; in fixed_sdram()
135 im->ddr.csbnds[0].csbnds = CONFIG_SYS_DDR_CS0_BNDS; in fixed_sdram()
136 im->ddr.cs_config[0] = CONFIG_SYS_DDR_CS0_CONFIG; in fixed_sdram()
137 im->ddr.timing_cfg_0 = CONFIG_SYS_DDR_TIMING_0; in fixed_sdram()
138 im->ddr.timing_cfg_1 = CONFIG_SYS_DDR_TIMING_1; in fixed_sdram()
[all …]
|
| /external/ImageMagick/PerlMagick/demo/ |
| D | single-pixels.pl | 9 my $im=Image::Magick->new();
10 $im->Read('logo:');
15 my $skin=$im->Get('pixel[400,200]');
18 $im->Set('pixel[1,1]'=>'0,0,0,0');
19 $im->Set('pixel[2,1]'=>$skin);
20 $im->Set('pixel[3,1]'=>'green');
21 $im->Set('pixel[4,1]'=>'rgb(255,0,255)');
26 my @pixel = $im->GetPixel( x=>400, y=>200 );
36 $im->SetPixel(x=>5,y=>1,color=>\@pixel);
42 $im->Set(page=>'0x0+0+0');
[all …]
|
| /external/u-boot/board/ids/ids8313/ |
| D | ids8313.c | 53 immap_t *im = (immap_t *)CONFIG_SYS_IMMR; in fixed_sdram() local
59 out_be32(&im->sysconf.ddrlaw[0].bar, in fixed_sdram()
61 out_be32(&im->sysconf.ddrlaw[0].ar, LBLAWAR_EN | (msize_log2 - 1)); in fixed_sdram()
62 out_be32(&im->sysconf.ddrcdr, CONFIG_SYS_DDRCDR_VALUE); in fixed_sdram()
71 out_be32(&im->ddr.csbnds[0].csbnds, (msize - 1) >> 24); in fixed_sdram()
72 out_be32(&im->ddr.cs_config[0], config); in fixed_sdram()
75 out_be32(&im->ddr.cs_config[1], 0); in fixed_sdram()
76 out_be32(&im->ddr.cs_config[2], 0); in fixed_sdram()
77 out_be32(&im->ddr.cs_config[3], 0); in fixed_sdram()
79 out_be32(&im->ddr.timing_cfg_3, CONFIG_SYS_DDR_TIMING_3); in fixed_sdram()
[all …]
|
| /external/u-boot/board/freescale/mpc837xerdb/ |
| D | mpc837xerdb.c | 67 immap_t *im = (immap_t *) CONFIG_SYS_IMMR; in dram_init() local
70 if ((im->sysconf.immrbar & IMMRBAR_BASE_ADDR) != (u32) im) in dram_init()
95 immap_t *im = (immap_t *) CONFIG_SYS_IMMR; in fixed_sdram() local
99 im->sysconf.ddrlaw[0].bar = CONFIG_SYS_SDRAM_BASE & 0xfffff000; in fixed_sdram()
100 im->sysconf.ddrlaw[0].ar = LBLAWAR_EN | (msize_log2 - 1); in fixed_sdram()
102 im->sysconf.ddrcdr = CONFIG_SYS_DDRCDR_VALUE; in fixed_sdram()
105 im->ddr.sdram_clk_cntl = CONFIG_SYS_DDR_SDRAM_CLK_CNTL; in fixed_sdram()
108 im->ddr.csbnds[0].csbnds = CONFIG_SYS_DDR_CS0_BNDS; in fixed_sdram()
109 im->ddr.cs_config[0] = CONFIG_SYS_DDR_CS0_CONFIG; in fixed_sdram()
112 im->ddr.timing_cfg_0 = CONFIG_SYS_DDR_TIMING_0; in fixed_sdram()
[all …]
|
| /external/u-boot/board/freescale/mpc837xemds/ |
| D | mpc837xemds.c | 66 struct immap __iomem *im = (struct immap __iomem *)CONFIG_SYS_IMMR; in board_mmc_init() local
76 clrsetbits_be32(&im->sysconf.sicrl, SICRL_USB_B, SICRL_USB_B_SD); in board_mmc_init()
77 clrsetbits_be32(&im->sysconf.sicrh, SICRH_GPIO2_E | SICRH_SPI, in board_mmc_init()
89 struct immap __iomem *im = (struct immap __iomem *)CONFIG_SYS_IMMR; in board_eth_init() local
90 u32 rcwh = in_be32(&im->reset.rcwh); in board_eth_init()
188 struct immap __iomem *im = (struct immap __iomem *)CONFIG_SYS_IMMR; in ft_tsec_fixup() local
189 u32 rcwh = in_be32(&im->reset.rcwh); in ft_tsec_fixup()
223 volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR; in dram_init() local
226 if ((im->sysconf.immrbar & IMMRBAR_BASE_ADDR) != (u32) im) in dram_init()
252 volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR; in fixed_sdram() local
[all …]
|
| /external/python/cpython3/Objects/ |
| D | classobject.c | 24 PyMethod_Function(PyObject *im) in PyMethod_Function() argument
26 if (!PyMethod_Check(im)) { in PyMethod_Function()
30 return ((PyMethodObject *)im)->im_func; in PyMethod_Function()
34 PyMethod_Self(PyObject *im) in PyMethod_Self() argument
36 if (!PyMethod_Check(im)) { in PyMethod_Self()
40 return ((PyMethodObject *)im)->im_self; in PyMethod_Self()
106 PyMethodObject *im; in PyMethod_New() local
111 im = free_list; in PyMethod_New()
112 if (im != NULL) { in PyMethod_New()
113 free_list = (PyMethodObject *)(im->im_self); in PyMethod_New()
[all …]
|
| /external/libxaac/decoder/ |
| D | ixheaacd_mps_hybrid_filt.c | 74 in_im = (WORD32)(input[n + i].im); in ixheaacd_mps_hyb_filt_type1()
107 output[q][i].im = (WORD32)(acc_im >> shift); in ixheaacd_mps_hyb_filt_type1()
135 in_im = (WORD32)(input[n + i].im); in ixheaacd_mps_hyb_filt_type2()
164 output[q][i].im = (WORD32)(acc_im >> shift); in ixheaacd_mps_hyb_filt_type2()
196 handle->lf_buffer[k][n].im = handle->lf_buffer[k][n + num_samples].im; in ixheaacd_mps_qmf_hybrid_analysis()
203 handle->lf_buffer[k][n + lf_samples_shift].im = (WORD32)(in_qmf[n][k].im); in ixheaacd_mps_qmf_hybrid_analysis()
210 handle->hf_buffer[k][n].im = handle->hf_buffer[k][n + num_samples].im; in ixheaacd_mps_qmf_hybrid_analysis()
218 handle->hf_buffer[k][n + hf_samples_shift].im = in ixheaacd_mps_qmf_hybrid_analysis()
219 (in_qmf[n][k + lf_qmf_bands].im); in ixheaacd_mps_qmf_hybrid_analysis()
234 hyb[n][k].im = (FLOAT32)scratch[k + 6][n].im; in ixheaacd_mps_qmf_hybrid_analysis()
[all …]
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| /external/u-boot/board/sbc8349/ |
| D | sbc8349.c | 41 volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR; in dram_init() local
44 if ((im->sysconf.immrbar & IMMRBAR_BASE_ADDR) != (u32)im) in dram_init()
48 im->sysconf.ddrlaw[0].bar = CONFIG_SYS_SDRAM_BASE & LAWBAR_BAR; in dram_init()
77 volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR; in fixed_sdram() local
82 im->sysconf.ddrlaw[0].bar = CONFIG_SYS_SDRAM_BASE & 0xfffff000; in fixed_sdram()
83 im->sysconf.ddrlaw[0].ar = LAWAR_EN | ((ddr_size_log2 - 1) & LAWAR_SIZE); in fixed_sdram()
92 im->ddr.csbnds[2].csbnds = in fixed_sdram()
96 im->ddr.cs_config[2] = CONFIG_SYS_DDR_CS2_CONFIG; in fixed_sdram()
99 im->ddr.cs_config[0] = 0; in fixed_sdram()
100 im->ddr.cs_config[1] = 0; in fixed_sdram()
[all …]
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| /external/u-boot/board/freescale/mpc8323erdb/ |
| D | mpc8323erdb.c | 79 volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR; in dram_init() local
82 if ((im->sysconf.immrbar & IMMRBAR_BASE_ADDR) != (u32) im) in dram_init()
86 im->sysconf.ddrlaw[0].bar = CONFIG_SYS_SDRAM_BASE & LAWBAR_BAR; in dram_init()
101 volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR; in fixed_sdram() local
113 im->sysconf.ddrlaw[0].ar = in fixed_sdram()
115 im->ddr.sdram_clk_cntl = CONFIG_SYS_DDR_CLK_CNTL; in fixed_sdram()
116 im->ddr.csbnds[0].csbnds = CONFIG_SYS_DDR_CS0_BNDS; in fixed_sdram()
117 im->ddr.cs_config[0] = CONFIG_SYS_DDR_CS0_CONFIG; in fixed_sdram()
118 im->ddr.timing_cfg_0 = CONFIG_SYS_DDR_TIMING_0; in fixed_sdram()
119 im->ddr.timing_cfg_1 = CONFIG_SYS_DDR_TIMING_1; in fixed_sdram()
[all …]
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| /external/u-boot/board/keymile/km83xx/ |
| D | km83xx.c | 212 immap_t *im = (immap_t *)CONFIG_SYS_IMMR; in fixed_sdram() local
217 out_be32(&im->sysconf.ddrlaw[0].ar, (LAWAR_EN | 0x1e)); in fixed_sdram()
218 out_be32(&im->ddr.csbnds[0].csbnds, (CONFIG_SYS_DDR_CS0_BNDS) | 0x7f); in fixed_sdram()
219 out_be32(&im->ddr.cs_config[0], CONFIG_SYS_DDR_CS0_CONFIG); in fixed_sdram()
220 out_be32(&im->ddr.timing_cfg_0, CONFIG_SYS_DDR_TIMING_0); in fixed_sdram()
221 out_be32(&im->ddr.timing_cfg_1, CONFIG_SYS_DDR_TIMING_1); in fixed_sdram()
222 out_be32(&im->ddr.timing_cfg_2, CONFIG_SYS_DDR_TIMING_2); in fixed_sdram()
223 out_be32(&im->ddr.timing_cfg_3, CONFIG_SYS_DDR_TIMING_3); in fixed_sdram()
224 out_be32(&im->ddr.sdram_cfg, CONFIG_SYS_DDR_SDRAM_CFG); in fixed_sdram()
225 out_be32(&im->ddr.sdram_cfg2, CONFIG_SYS_DDR_SDRAM_CFG2); in fixed_sdram()
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| /external/aac/libSACenc/src/ |
| D | sacenc_vectorfunctions.cpp | 132 maxVal |= fAbs(x[i].v.im); in sumUpCplxPow2()
147 FIXP_DBL re, im, sum; in sumUpCplxPow2() local
149 re = im = sum = FL2FXCONST_DBL(0.0); in sumUpCplxPow2()
154 im += fPow2Div2(x[i].v.im << cs); in sumUpCplxPow2()
160 im += fPow2Div2(x[i].v.im) >> cs; in sumUpCplxPow2()
164 sum = (re >> 1) + (im >> 1); in sumUpCplxPow2()
181 maxVal |= fAbs(x[i][j].v.im); in sumUpCplxPow2Dim2()
197 FIXP_DBL re, im, sum; in sumUpCplxPow2Dim2() local
199 re = im = sum = FL2FXCONST_DBL(0.0); in sumUpCplxPow2Dim2()
205 im += fPow2Div2(x[i][j].v.im << cs); in sumUpCplxPow2Dim2()
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