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Searched refs:SrcVT (Results 1 – 25 of 116) sorted by relevance

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/external/llvm/lib/Target/PowerPC/
DPPCFastISel.cpp164 bool PPCEmitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT,
819 MVT SrcVT = SrcEVT.getSimpleVT(); in PPCEmitCmp() local
821 if (SrcVT == MVT::i1 && PPCSubTarget->useCRBits()) in PPCEmitCmp()
834 if (SrcVT == MVT::i64 || SrcVT == MVT::i32 || SrcVT == MVT::i16 || in PPCEmitCmp()
835 SrcVT == MVT::i8 || SrcVT == MVT::i1) { in PPCEmitCmp()
845 switch (SrcVT.SimpleTy) { in PPCEmitCmp()
885 if (!PPCEmitIntExt(SrcVT, SrcReg1, MVT::i32, ExtReg, IsZExt)) in PPCEmitCmp()
891 if (!PPCEmitIntExt(SrcVT, SrcReg2, MVT::i32, ExtReg, IsZExt)) in PPCEmitCmp()
910 EVT SrcVT = TLI.getValueType(DL, Src->getType(), true); in SelectFPExt() local
913 if (SrcVT != MVT::f32 || DestVT != MVT::f64) in SelectFPExt()
[all …]
/external/llvm/lib/Target/Mips/
DMipsFastISel.cpp139 unsigned emitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT, bool isZExt);
140 bool emitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT, unsigned DestReg,
143 bool emitIntZExt(MVT SrcVT, unsigned SrcReg, MVT DestVT, unsigned DestReg);
145 bool emitIntSExt(MVT SrcVT, unsigned SrcReg, MVT DestVT, unsigned DestReg);
146 bool emitIntSExt32r1(MVT SrcVT, unsigned SrcReg, MVT DestVT,
148 bool emitIntSExt32r2(MVT SrcVT, unsigned SrcReg, MVT DestVT,
952 EVT SrcVT = TLI.getValueType(DL, Src->getType(), true); in selectFPExt() local
955 if (SrcVT != MVT::f32 || DestVT != MVT::f64) in selectFPExt()
1026 EVT SrcVT = TLI.getValueType(DL, Src->getType(), true); in selectFPTrunc() local
1029 if (SrcVT != MVT::f64 || DestVT != MVT::f32) in selectFPTrunc()
[all …]
/external/llvm-project/llvm/lib/Target/PowerPC/
DPPCFastISel.cpp173 bool PPCEmitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT,
830 MVT SrcVT = SrcEVT.getSimpleVT(); in PPCEmitCmp() local
832 if (SrcVT == MVT::i1 && Subtarget->useCRBits()) in PPCEmitCmp()
846 if (SrcVT == MVT::i64 || SrcVT == MVT::i32 || SrcVT == MVT::i16 || in PPCEmitCmp()
847 SrcVT == MVT::i8 || SrcVT == MVT::i1) { in PPCEmitCmp()
872 switch (SrcVT.SimpleTy) { in PPCEmitCmp()
937 if (!PPCEmitIntExt(SrcVT, SrcReg1, MVT::i32, ExtReg, IsZExt)) in PPCEmitCmp()
943 if (!PPCEmitIntExt(SrcVT, SrcReg2, MVT::i32, ExtReg, IsZExt)) in PPCEmitCmp()
962 EVT SrcVT = TLI.getValueType(DL, Src->getType(), true); in SelectFPExt() local
965 if (SrcVT != MVT::f32 || DestVT != MVT::f64) in SelectFPExt()
[all …]
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/
DPPCFastISel.cpp172 bool PPCEmitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT,
828 MVT SrcVT = SrcEVT.getSimpleVT(); in PPCEmitCmp() local
830 if (SrcVT == MVT::i1 && PPCSubTarget->useCRBits()) in PPCEmitCmp()
844 if (SrcVT == MVT::i64 || SrcVT == MVT::i32 || SrcVT == MVT::i16 || in PPCEmitCmp()
845 SrcVT == MVT::i8 || SrcVT == MVT::i1) { in PPCEmitCmp()
870 switch (SrcVT.SimpleTy) { in PPCEmitCmp()
935 if (!PPCEmitIntExt(SrcVT, SrcReg1, MVT::i32, ExtReg, IsZExt)) in PPCEmitCmp()
941 if (!PPCEmitIntExt(SrcVT, SrcReg2, MVT::i32, ExtReg, IsZExt)) in PPCEmitCmp()
960 EVT SrcVT = TLI.getValueType(DL, Src->getType(), true); in SelectFPExt() local
963 if (SrcVT != MVT::f32 || DestVT != MVT::f64) in SelectFPExt()
[all …]
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/
DMipsFastISel.cpp187 unsigned emitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT, bool isZExt);
188 bool emitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT, unsigned DestReg,
191 bool emitIntZExt(MVT SrcVT, unsigned SrcReg, MVT DestVT, unsigned DestReg);
193 bool emitIntSExt(MVT SrcVT, unsigned SrcReg, MVT DestVT, unsigned DestReg);
194 bool emitIntSExt32r1(MVT SrcVT, unsigned SrcReg, MVT DestVT,
196 bool emitIntSExt32r2(MVT SrcVT, unsigned SrcReg, MVT DestVT,
1000 EVT SrcVT = TLI.getValueType(DL, Src->getType(), true); in selectFPExt() local
1003 if (SrcVT != MVT::f32 || DestVT != MVT::f64) in selectFPExt()
1079 EVT SrcVT = TLI.getValueType(DL, Src->getType(), true); in selectFPTrunc() local
1082 if (SrcVT != MVT::f64 || DestVT != MVT::f32) in selectFPTrunc()
[all …]
/external/llvm-project/llvm/lib/Target/Mips/
DMipsFastISel.cpp187 unsigned emitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT, bool isZExt);
188 bool emitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT, unsigned DestReg,
191 bool emitIntZExt(MVT SrcVT, unsigned SrcReg, MVT DestVT, unsigned DestReg);
193 bool emitIntSExt(MVT SrcVT, unsigned SrcReg, MVT DestVT, unsigned DestReg);
194 bool emitIntSExt32r1(MVT SrcVT, unsigned SrcReg, MVT DestVT,
196 bool emitIntSExt32r2(MVT SrcVT, unsigned SrcReg, MVT DestVT,
998 EVT SrcVT = TLI.getValueType(DL, Src->getType(), true); in selectFPExt() local
1001 if (SrcVT != MVT::f32 || DestVT != MVT::f64) in selectFPExt()
1077 EVT SrcVT = TLI.getValueType(DL, Src->getType(), true); in selectFPTrunc() local
1080 if (SrcVT != MVT::f64 || DestVT != MVT::f32) in selectFPTrunc()
[all …]
/external/llvm/lib/Target/AArch64/
DAArch64FastISel.cpp153 bool optimizeIntExtLoad(const Instruction *I, MVT RetVT, MVT SrcVT);
188 unsigned emitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT, bool isZExt);
219 unsigned emitLSL_ri(MVT RetVT, MVT SrcVT, unsigned Op0Reg, bool Op0IsKill,
223 unsigned emitLSR_ri(MVT RetVT, MVT SrcVT, unsigned Op0Reg, bool Op0IsKill,
227 unsigned emitASR_ri(MVT RetVT, MVT SrcVT, unsigned Op0Reg, bool Op0IsKill,
1104 MVT SrcVT = RetVT; in emitAddSub() local
1131 LHSReg = emitIntExt(SrcVT, LHSReg, RetVT, IsZExt); in emitAddSub()
1229 RHSReg = emitIntExt(SrcVT, RHSReg, RetVT, IsZExt); in emitAddSub()
2750 EVT SrcVT = TLI.getValueType(DL, I->getOperand(0)->getType(), true); in selectFPToInt() local
2751 if (SrcVT == MVT::f128 || SrcVT == MVT::f16) in selectFPToInt()
[all …]
/external/llvm-project/llvm/lib/Target/AArch64/
DAArch64FastISel.cpp196 bool optimizeIntExtLoad(const Instruction *I, MVT RetVT, MVT SrcVT);
233 unsigned emitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT, bool isZExt);
264 unsigned emitLSL_ri(MVT RetVT, MVT SrcVT, unsigned Op0Reg, bool Op0IsKill,
268 unsigned emitLSR_ri(MVT RetVT, MVT SrcVT, unsigned Op0Reg, bool Op0IsKill,
272 unsigned emitASR_ri(MVT RetVT, MVT SrcVT, unsigned Op0Reg, bool Op0IsKill,
1181 MVT SrcVT = RetVT; in emitAddSub() local
1208 LHSReg = emitIntExt(SrcVT, LHSReg, RetVT, IsZExt); in emitAddSub()
1306 RHSReg = emitIntExt(SrcVT, RHSReg, RetVT, IsZExt); in emitAddSub()
2879 EVT SrcVT = TLI.getValueType(DL, I->getOperand(0)->getType(), true); in selectFPToInt() local
2880 if (SrcVT == MVT::f128 || SrcVT == MVT::f16) in selectFPToInt()
[all …]
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64FastISel.cpp196 bool optimizeIntExtLoad(const Instruction *I, MVT RetVT, MVT SrcVT);
233 unsigned emitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT, bool isZExt);
264 unsigned emitLSL_ri(MVT RetVT, MVT SrcVT, unsigned Op0Reg, bool Op0IsKill,
268 unsigned emitLSR_ri(MVT RetVT, MVT SrcVT, unsigned Op0Reg, bool Op0IsKill,
272 unsigned emitASR_ri(MVT RetVT, MVT SrcVT, unsigned Op0Reg, bool Op0IsKill,
1183 MVT SrcVT = RetVT; in emitAddSub() local
1210 LHSReg = emitIntExt(SrcVT, LHSReg, RetVT, IsZExt); in emitAddSub()
1308 RHSReg = emitIntExt(SrcVT, RHSReg, RetVT, IsZExt); in emitAddSub()
2881 EVT SrcVT = TLI.getValueType(DL, I->getOperand(0)->getType(), true); in selectFPToInt() local
2882 if (SrcVT == MVT::f128 || SrcVT == MVT::f16) in selectFPToInt()
[all …]
/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/
DLegalizeVectorOps.cpp708 EVT SrcVT = LD->getMemoryVT(); in ExpandLoad() local
709 EVT SrcEltVT = SrcVT.getScalarType(); in ExpandLoad()
710 unsigned NumElem = SrcVT.getVectorNumElements(); in ExpandLoad()
714 if (SrcVT.getVectorNumElements() > 1 && !SrcEltVT.isByteSized()) { in ExpandLoad()
740 unsigned RemainingBytes = SrcVT.getStoreSize(); in ExpandLoad()
1079 EVT SrcVT = Src.getValueType(); in ExpandANY_EXTEND_VECTOR_INREG() local
1080 int NumSrcElements = SrcVT.getVectorNumElements(); in ExpandANY_EXTEND_VECTOR_INREG()
1084 if (SrcVT.bitsLE(VT)) { in ExpandANY_EXTEND_VECTOR_INREG()
1085 assert((VT.getSizeInBits() % SrcVT.getScalarSizeInBits()) == 0 && in ExpandANY_EXTEND_VECTOR_INREG()
1087 NumSrcElements = VT.getSizeInBits() / SrcVT.getScalarSizeInBits(); in ExpandANY_EXTEND_VECTOR_INREG()
[all …]
DTargetLowering.cpp630 EVT SrcVT = Src.getValueType(); in SimplifyMultipleUseDemandedBits() local
632 unsigned NumSrcEltBits = SrcVT.getScalarSizeInBits(); in SimplifyMultipleUseDemandedBits()
641 if (SrcVT.isVector() && (NumDstEltBits % NumSrcEltBits) == 0 && in SimplifyMultipleUseDemandedBits()
644 unsigned NumSrcElts = SrcVT.getVectorNumElements(); in SimplifyMultipleUseDemandedBits()
667 unsigned NumSrcElts = SrcVT.isVector() ? SrcVT.getVectorNumElements() : 1; in SimplifyMultipleUseDemandedBits()
1680 EVT SrcVT = Src.getValueType(); in SimplifyDemandedBits() local
1681 unsigned InBits = SrcVT.getScalarSizeInBits(); in SimplifyDemandedBits()
1682 unsigned InElts = SrcVT.isVector() ? SrcVT.getVectorNumElements() : 1; in SimplifyDemandedBits()
1690 VT.getSizeInBits() == SrcVT.getSizeInBits() && in SimplifyDemandedBits()
1713 EVT SrcVT = Src.getValueType(); in SimplifyDemandedBits() local
[all …]
/external/llvm-project/llvm/lib/CodeGen/SelectionDAG/
DLegalizeVectorOps.cpp980 EVT SrcVT = Src.getValueType(); in ExpandANY_EXTEND_VECTOR_INREG() local
981 int NumSrcElements = SrcVT.getVectorNumElements(); in ExpandANY_EXTEND_VECTOR_INREG()
985 if (SrcVT.bitsLE(VT)) { in ExpandANY_EXTEND_VECTOR_INREG()
986 assert((VT.getSizeInBits() % SrcVT.getScalarSizeInBits()) == 0 && in ExpandANY_EXTEND_VECTOR_INREG()
988 NumSrcElements = VT.getSizeInBits() / SrcVT.getScalarSizeInBits(); in ExpandANY_EXTEND_VECTOR_INREG()
989 SrcVT = EVT::getVectorVT(*DAG.getContext(), SrcVT.getScalarType(), in ExpandANY_EXTEND_VECTOR_INREG()
991 Src = DAG.getNode(ISD::INSERT_SUBVECTOR, DL, SrcVT, DAG.getUNDEF(SrcVT), in ExpandANY_EXTEND_VECTOR_INREG()
1007 DAG.getVectorShuffle(SrcVT, DL, Src, DAG.getUNDEF(SrcVT), ShuffleMask)); in ExpandANY_EXTEND_VECTOR_INREG()
1014 EVT SrcVT = Src.getValueType(); in ExpandSIGN_EXTEND_VECTOR_INREG() local
1024 unsigned SrcEltWidth = SrcVT.getScalarSizeInBits(); in ExpandSIGN_EXTEND_VECTOR_INREG()
[all …]
DTargetLowering.cpp645 EVT SrcVT = Src.getValueType(); in SimplifyMultipleUseDemandedBits() local
647 if (SrcVT == DstVT) in SimplifyMultipleUseDemandedBits()
650 unsigned NumSrcEltBits = SrcVT.getScalarSizeInBits(); in SimplifyMultipleUseDemandedBits()
658 if (SrcVT.isVector() && (NumDstEltBits % NumSrcEltBits) == 0 && in SimplifyMultipleUseDemandedBits()
661 unsigned NumSrcElts = SrcVT.getVectorNumElements(); in SimplifyMultipleUseDemandedBits()
684 unsigned NumSrcElts = SrcVT.isVector() ? SrcVT.getVectorNumElements() : 1; in SimplifyMultipleUseDemandedBits()
794 EVT SrcVT = Src.getValueType(); in SimplifyMultipleUseDemandedBits() local
796 if (DemandedElts == 1 && DstVT.getSizeInBits() == SrcVT.getSizeInBits() && in SimplifyMultipleUseDemandedBits()
798 DemandedBits.getActiveBits() <= SrcVT.getScalarSizeInBits()) { in SimplifyMultipleUseDemandedBits()
1851 EVT SrcVT = Src.getValueType(); in SimplifyDemandedBits() local
[all …]
DLegalizeDAG.cpp723 EVT SrcVT = LD->getMemoryVT(); in LegalizeLoadOps() local
724 TypeSize SrcWidth = SrcVT.getSizeInBits(); in LegalizeLoadOps()
728 if (SrcWidth != SrcVT.getStoreSizeInBits() && in LegalizeLoadOps()
736 (SrcVT != MVT::i1 || in LegalizeLoadOps()
741 unsigned NewWidth = SrcVT.getStoreSizeInBits(); in LegalizeLoadOps()
761 Result, DAG.getValueType(SrcVT)); in LegalizeLoadOps()
766 DAG.getValueType(SrcVT)); in LegalizeLoadOps()
772 assert(!SrcVT.isVector() && "Unsupported extload!"); in LegalizeLoadOps()
849 SrcVT.getSimpleVT())) { in LegalizeLoadOps()
877 if (!TLI.isLoadExtLegal(ISD::EXTLOAD, DestVT, SrcVT)) { in LegalizeLoadOps()
[all …]
/external/llvm/lib/CodeGen/SelectionDAG/
DLegalizeVectorOps.cpp497 EVT SrcVT = LD->getMemoryVT(); in ExpandLoad() local
498 EVT SrcEltVT = SrcVT.getScalarType(); in ExpandLoad()
499 unsigned NumElem = SrcVT.getVectorNumElements(); in ExpandLoad()
504 if (SrcVT.getVectorNumElements() > 1 && !SrcEltVT.isByteSized()) { in ExpandLoad()
530 unsigned RemainingBytes = SrcVT.getStoreSize(); in ExpandLoad()
794 EVT SrcVT = Src.getValueType(); in ExpandANY_EXTEND_VECTOR_INREG() local
795 int NumSrcElements = SrcVT.getVectorNumElements(); in ExpandANY_EXTEND_VECTOR_INREG()
809 DAG.getVectorShuffle(SrcVT, DL, Src, DAG.getUNDEF(SrcVT), ShuffleMask)); in ExpandANY_EXTEND_VECTOR_INREG()
816 EVT SrcVT = Src.getValueType(); in ExpandSIGN_EXTEND_VECTOR_INREG() local
826 unsigned SrcEltWidth = SrcVT.getVectorElementType().getSizeInBits(); in ExpandSIGN_EXTEND_VECTOR_INREG()
[all …]
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
DARMFastISel.cpp205 unsigned ARMEmitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT, bool isZExt);
1355 MVT SrcVT = SrcEVT.getSimpleVT(); in ARMEmitCmp() local
1371 if (SrcVT == MVT::i32 || SrcVT == MVT::i16 || SrcVT == MVT::i8 || in ARMEmitCmp()
1372 SrcVT == MVT::i1) { in ARMEmitCmp()
1386 if (SrcVT == MVT::f32 || SrcVT == MVT::f64) in ARMEmitCmp()
1394 switch (SrcVT.SimpleTy) { in ARMEmitCmp()
1436 SrcReg1 = ARMEmitIntExt(SrcVT, SrcReg1, MVT::i32, isZExt); in ARMEmitCmp()
1439 SrcReg2 = ARMEmitIntExt(SrcVT, SrcReg2, MVT::i32, isZExt); in ARMEmitCmp()
1550 MVT SrcVT = SrcEVT.getSimpleVT(); in SelectIToFP() local
1551 if (SrcVT != MVT::i32 && SrcVT != MVT::i16 && SrcVT != MVT::i8) in SelectIToFP()
[all …]
/external/llvm-project/llvm/lib/Target/ARM/
DARMFastISel.cpp204 unsigned ARMEmitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT, bool isZExt);
1342 MVT SrcVT = SrcEVT.getSimpleVT(); in ARMEmitCmp() local
1358 if (SrcVT == MVT::i32 || SrcVT == MVT::i16 || SrcVT == MVT::i8 || in ARMEmitCmp()
1359 SrcVT == MVT::i1) { in ARMEmitCmp()
1373 if (SrcVT == MVT::f32 || SrcVT == MVT::f64) in ARMEmitCmp()
1381 switch (SrcVT.SimpleTy) { in ARMEmitCmp()
1423 SrcReg1 = ARMEmitIntExt(SrcVT, SrcReg1, MVT::i32, isZExt); in ARMEmitCmp()
1426 SrcReg2 = ARMEmitIntExt(SrcVT, SrcReg2, MVT::i32, isZExt); in ARMEmitCmp()
1537 MVT SrcVT = SrcEVT.getSimpleVT(); in SelectIToFP() local
1538 if (SrcVT != MVT::i32 && SrcVT != MVT::i16 && SrcVT != MVT::i8) in SelectIToFP()
[all …]
/external/llvm/lib/Target/ARM/
DARMFastISel.cpp175 unsigned ARMEmitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT, bool isZExt);
1354 MVT SrcVT = SrcEVT.getSimpleVT(); in ARMEmitCmp() local
1368 if (SrcVT == MVT::i32 || SrcVT == MVT::i16 || SrcVT == MVT::i8 || in ARMEmitCmp()
1369 SrcVT == MVT::i1) { in ARMEmitCmp()
1383 if (SrcVT == MVT::f32 || SrcVT == MVT::f64) in ARMEmitCmp()
1391 switch (SrcVT.SimpleTy) { in ARMEmitCmp()
1433 SrcReg1 = ARMEmitIntExt(SrcVT, SrcReg1, MVT::i32, isZExt); in ARMEmitCmp()
1436 SrcReg2 = ARMEmitIntExt(SrcVT, SrcReg2, MVT::i32, isZExt); in ARMEmitCmp()
1547 MVT SrcVT = SrcEVT.getSimpleVT(); in SelectIToFP() local
1548 if (SrcVT != MVT::i32 && SrcVT != MVT::i16 && SrcVT != MVT::i8) in SelectIToFP()
[all …]
/external/llvm-project/llvm/lib/Target/X86/
DX86FastISel.cpp96 bool X86FastEmitExtend(ISD::NodeType Opc, EVT DstVT, unsigned Src, EVT SrcVT,
705 unsigned Src, EVT SrcVT, in X86FastEmitExtend() argument
707 unsigned RR = fastEmit_r(SrcVT.getSimpleVT(), DstVT.getSimpleVT(), Opc, in X86FastEmitExtend()
1241 EVT SrcVT = TLI.getValueType(DL, RV->getType()); in X86SelectRet() local
1244 if (SrcVT != DstVT) { in X86SelectRet()
1245 if (SrcVT != MVT::i1 && SrcVT != MVT::i8 && SrcVT != MVT::i16) in X86SelectRet()
1253 if (SrcVT == MVT::i1) { in X86SelectRet()
1258 SrcVT = MVT::i8; in X86SelectRet()
1263 SrcReg = fastEmit_r(SrcVT.getSimpleVT(), DstVT.getSimpleVT(), Op, SrcReg, in X86SelectRet()
1546 MVT SrcVT = TLI.getSimpleValueType(DL, I->getOperand(0)->getType()); in X86SelectZExt() local
[all …]
DX86ISelLowering.cpp5255 bool X86TargetLowering::isExtractSubvectorCheap(EVT ResVT, EVT SrcVT, in isExtractSubvectorCheap() argument
5263 return Index == 0 || ((ResVT.getSizeInBits() == SrcVT.getSizeInBits()*2) && in isExtractSubvectorCheap()
6688 EVT SrcVT = Op.getOperand(0).getValueType(); in getTargetConstantBitsFromNode() local
6689 unsigned NumSrcElts = SrcVT.getVectorNumElements(); in getTargetConstantBitsFromNode()
7618 EVT SrcVT = SrcVec.getValueType(); in getFauxShuffleMask() local
7619 if (!SrcVT.getScalarType().isByteSized()) in getFauxShuffleMask()
7622 unsigned SrcByte = SrcIdx * (SrcVT.getScalarSizeInBits() / 8); in getFauxShuffleMask()
7625 std::min<unsigned>(MinBitsPerElt, SrcVT.getScalarSizeInBits()); in getFauxShuffleMask()
7685 EVT SrcVT = Src.getValueType(); in getFauxShuffleMask() local
7687 if (!SrcVT.isSimple() || (SrcVT.getSizeInBits() % 128) != 0 || in getFauxShuffleMask()
[all …]
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86FastISel.cpp97 bool X86FastEmitExtend(ISD::NodeType Opc, EVT DstVT, unsigned Src, EVT SrcVT,
706 unsigned Src, EVT SrcVT, in X86FastEmitExtend() argument
708 unsigned RR = fastEmit_r(SrcVT.getSimpleVT(), DstVT.getSimpleVT(), Opc, in X86FastEmitExtend()
1222 EVT SrcVT = TLI.getValueType(DL, RV->getType()); in X86SelectRet() local
1225 if (SrcVT != DstVT) { in X86SelectRet()
1226 if (SrcVT != MVT::i1 && SrcVT != MVT::i8 && SrcVT != MVT::i16) in X86SelectRet()
1234 if (SrcVT == MVT::i1) { in X86SelectRet()
1238 SrcVT = MVT::i8; in X86SelectRet()
1242 SrcReg = fastEmit_r(SrcVT.getSimpleVT(), DstVT.getSimpleVT(), Op, in X86SelectRet()
1530 MVT SrcVT = TLI.getSimpleValueType(DL, I->getOperand(0)->getType()); in X86SelectZExt() local
[all …]
DX86SelectionDAGInfo.cpp281 EVT SrcVT = Src.getValueType(); in emitConstantSizeRepmov() local
285 DAG.getNode(ISD::ADD, dl, SrcVT, Src, DAG.getConstant(Offset, dl, SrcVT)), in emitConstantSizeRepmov()
/external/llvm/lib/Target/X86/
DX86SelectionDAGInfo.cpp267 EVT SrcVT = Src.getValueType(); in EmitTargetCodeForMemcpy() local
273 DAG.getNode(ISD::ADD, dl, SrcVT, Src, in EmitTargetCodeForMemcpy()
275 SrcVT)), in EmitTargetCodeForMemcpy()
DX86FastISel.cpp97 bool X86FastEmitExtend(ISD::NodeType Opc, EVT DstVT, unsigned Src, EVT SrcVT,
696 unsigned Src, EVT SrcVT, in X86FastEmitExtend() argument
698 unsigned RR = fastEmit_r(SrcVT.getSimpleVT(), DstVT.getSimpleVT(), Opc, in X86FastEmitExtend()
1211 EVT SrcVT = TLI.getValueType(DL, RV->getType()); in X86SelectRet() local
1214 if (SrcVT != DstVT) { in X86SelectRet()
1215 if (SrcVT != MVT::i1 && SrcVT != MVT::i8 && SrcVT != MVT::i16) in X86SelectRet()
1223 if (SrcVT == MVT::i1) { in X86SelectRet()
1227 SrcVT = MVT::i8; in X86SelectRet()
1231 SrcReg = fastEmit_r(SrcVT.getSimpleVT(), DstVT.getSimpleVT(), Op, in X86SelectRet()
1515 MVT SrcVT = TLI.getSimpleValueType(DL, I->getOperand(0)->getType()); in X86SelectZExt() local
[all …]
/external/llvm/lib/Target/X86/Utils/
DX86ShuffleDecode.cpp279 void DecodeSubVectorBroadcast(MVT DstVT, MVT SrcVT, in DecodeSubVectorBroadcast() argument
281 assert(SrcVT.getScalarType() == DstVT.getScalarType() && in DecodeSubVectorBroadcast()
283 unsigned NumElts = SrcVT.getVectorNumElements(); in DecodeSubVectorBroadcast()
284 unsigned Scale = DstVT.getSizeInBits() / SrcVT.getSizeInBits(); in DecodeSubVectorBroadcast()

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