| /external/llvm/test/CodeGen/AArch64/ |
| D | arm64-ldp-cluster.ll | 6 ; CHECK: ********** MI Scheduling **********
11 ; EXYNOS: ********** MI Scheduling **********
26 ; CHECK: ********** MI Scheduling **********
31 ; EXYNOS: ********** MI Scheduling **********
47 ; CHECK: ********** MI Scheduling **********
52 ; EXYNOS: ********** MI Scheduling **********
67 ; CHECK: ********** MI Scheduling **********
72 ; EXYNOS: ********** MI Scheduling **********
90 ; CHECK: ********** MI Scheduling **********
95 ; EXYNOS: ********** MI Scheduling **********
[all …]
|
| D | aarch64-stp-cluster.ll | 4 ; CHECK: ********** MI Scheduling **********
25 ; CHECK: ********** MI Scheduling **********
46 ; CHECK:********** MI Scheduling **********
67 ; CHECK:********** MI Scheduling **********
88 ; CHECK:********** MI Scheduling **********
109 ; CHECK:********** MI Scheduling **********
130 ; CHECK: ********** MI Scheduling **********
|
| /external/llvm-project/llvm/test/CodeGen/PowerPC/ |
| D | fusion-load-store.ll | 11 ; CHECK: ********** MI Scheduling **********
19 ; CHECK: ********** MI Scheduling **********
40 ; CHECK: ********** MI Scheduling **********
48 ; CHECK: ********** MI Scheduling **********
69 ; CHECK: ********** MI Scheduling **********
77 ; CHECK: ********** MI Scheduling **********
98 ; CHECK: ********** MI Scheduling **********
106 ; CHECK: ********** MI Scheduling **********
127 ; CHECK: ********** MI Scheduling **********
135 ; CHECK: ********** MI Scheduling **********
[all …]
|
| D | read-set-flm.ll | 20 ; LOG: *** MI Scheduling ***
23 ; LOG: *** MI Scheduling ***
27 ; LOG: *** MI Scheduling ***
55 ; LOG: ***** MI Scheduling *****
58 ; LOG: ***** MI Scheduling *****
62 ; LOG: ***** MI Scheduling *****
|
| D | macro-fusion.ll | 9 ; CHECK-P8: ********** MI Scheduling **********
14 ; CHECK-P8: ********** MI Scheduling **********
|
| /external/llvm-project/llvm/test/CodeGen/ARM/ |
| D | cortex-a57-misched-alu.ll | 7 ; CHECK: ********** MI Scheduling **********
35 ; CHECK: Scheduling
41 ; CHECK: Scheduling
47 ; CHECK: Scheduling
53 ; CHECK: Scheduling
59 ; CHECK: Scheduling
|
| D | single-issue-r52.mir | 21 # CHECK: ********** MI Scheduling **********
33 # TOPDOWN: Scheduling SU(1) %1:qqpr = VLD4d8Pseudo
35 # TOPDOWN: Scheduling SU(2) %4:dpr = VADDv8i8
37 # BOTTOMUP: Scheduling SU(2) %4:dpr = VADDv8i8
38 # BOTTOMUP: Scheduling SU(1) %1:qqpr = VLD4d8Pseudo
|
| D | postrasched.ll | 6 ; CHECK: ********** MI Scheduling **********
9 ; CHECK: ********** MI Scheduling **********
22 ; CHECK: ********** List Scheduling **********
|
| D | proc-resource-sched.ll | 17 ; CHECK-R52: MI Scheduling
19 ; CHECK-R52: Scheduling SU(5) %5:gpr = nsw ADDrr %3:gpr, %2:gpr, 14, $noreg, $noreg
20 ; CHECK-R52: Scheduling SU(4) %4:gpr = nsw ADDrr %1:gpr, %0:gpr, 14, $noreg, $noreg
|
| D | cortex-a57-misched-vfma.ll | 7 ; CHECK: ********** MI Scheduling **********
46 ; CHECK: ********** MI Scheduling **********
84 ; CHECK: ********** MI Scheduling **********
123 ; CHECK: ********** MI Scheduling **********
161 ; CHECK: ********** MI Scheduling **********
180 ; CHECK: ********** MI Scheduling **********
|
| D | cortex-a57-misched-vstm.ll | 4 ; CHECK: ********** MI Scheduling **********
6 ; CHECK: ********** MI Scheduling **********
|
| D | cortex-a57-misched-ldm.ll | 4 ; CHECK: ********** MI Scheduling **********
6 ; CHECK: ********** MI Scheduling **********
|
| D | cortex-a57-misched-vldm.ll | 4 ; CHECK: ********** MI Scheduling **********
6 ; CHECK: ********** MI Scheduling **********
|
| D | cortex-a57-misched-stm.ll | 5 ; CHECK: ********** MI Scheduling **********
7 ; CHECK: ********** MI Scheduling **********
|
| D | cortex-a57-misched-ldm-wrback.ll | 9 ; CHECK: ********** MI Scheduling **********
11 ; CHECK: ********** MI Scheduling **********
|
| D | cortex-a57-misched-stm-wrback.ll | 5 ; CHECK: ********** MI Scheduling **********
7 ; CHECK: ********** MI Scheduling **********
|
| D | 2012-06-12-SchedMemLatency.ll | 7 ; CHECK: ** List Scheduling
17 ; CHECK: ** List Scheduling
|
| D | cortex-a57-misched-vstm-wrback.ll | 4 ; CHECK: ********** MI Scheduling **********
6 ; CHECK: ********** MI Scheduling **********
|
| /external/llvm-project/llvm/test/CodeGen/AArch64/ |
| D | arm64-ldp-cluster.ll | 6 ; CHECK: ********** MI Scheduling **********
21 ; CHECK: ********** MI Scheduling **********
37 ; CHECK: ********** MI Scheduling **********
52 ; CHECK: ********** MI Scheduling **********
70 ; CHECK: ********** MI Scheduling **********
88 ; CHECK: ********** MI Scheduling **********
103 ; CHECK: ********** MI Scheduling **********
|
| D | aarch64-stp-cluster.ll | 5 ; CHECK: ********** MI Scheduling **********
26 ; CHECK: ********** MI Scheduling **********
47 ; CHECK:********** MI Scheduling **********
68 ; CHECK:********** MI Scheduling **********
89 ; CHECK:********** MI Scheduling **********
110 ; CHECK:********** MI Scheduling **********
131 ; CHECK: ********** MI Scheduling **********
151 ; CHECK: ********** MI Scheduling **********
200 ; CHECK: ********** MI Scheduling **********
220 ; CHECK: ********** MI Scheduling **********
|
| /external/perfetto/test/trace_processor/graphics/ |
| D | actual_frame_timeline_events.out | 8 90,16,1000,8,7,"Layer1","Early Present",1,0,"SurfaceFlinger Scheduling","Valid Prediction","Other J…
9 108,4,666,8,0,"[NULL]","Early Present",1,0,"SurfaceFlinger Scheduling","Valid Prediction","Self Jan…
10 148,8,666,12,0,"[NULL]","Late Present",0,0,"SurfaceFlinger Scheduling, SurfaceFlinger CPU Deadline …
|
| D | android_sysui_cuj_event.out | 3 …AND - jank cause",8000000,15000000,"MainThread - binder transaction time,SurfaceFlinger Scheduling"
8 …AND - jank cause",200000000,15000000,"SurfaceFlinger GPU Deadline Missed,SurfaceFlinger Scheduling"
|
| D | android_sysui_cuj.out | 20 jank_cause: "SurfaceFlinger Scheduling"
59 jank_cause: "SurfaceFlinger Scheduling"
|
| /external/llvm-project/polly/lib/CodeGen/ |
| D | LoopGeneratorsKMP.cpp | 200 OMPGeneralSchedulingType Scheduling = in createSubFn() local
203 switch (Scheduling) { in createSubFn()
253 if (Scheduling == OMPGeneralSchedulingType::StaticChunked) { in createSubFn()
263 if (Scheduling == OMPGeneralSchedulingType::StaticChunked) { in createSubFn()
302 if (Scheduling == OMPGeneralSchedulingType::StaticChunked || in createSubFn()
303 Scheduling == OMPGeneralSchedulingType::StaticNonChunked) { in createSubFn()
548 int ChunkSize, OMPGeneralSchedulingType Scheduling) const { in getSchedType()
549 if (ChunkSize == 0 && Scheduling == OMPGeneralSchedulingType::StaticChunked) in getSchedType()
552 return Scheduling; in getSchedType()
|
| /external/llvm/test/CodeGen/ARM/ |
| D | 2012-06-12-SchedMemLatency.ll | 7 ; CHECK: ** List Scheduling
17 ; CHECK: ** List Scheduling
|