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/external/mesa3d/src/gallium/drivers/radeonsi/
Dradeon_vcn_enc_1_2.c49 static void radeon_enc_session_info(struct radeon_encoder *enc) in radeon_enc_session_info() argument
51 RADEON_ENC_BEGIN(enc->cmd.session_info); in radeon_enc_session_info()
52 RADEON_ENC_CS(enc->enc_pic.session_info.interface_version); in radeon_enc_session_info()
53 RADEON_ENC_READWRITE(enc->si->res->buf, enc->si->res->domains, 0x0); in radeon_enc_session_info()
58 static void radeon_enc_task_info(struct radeon_encoder *enc, bool need_feedback) in radeon_enc_task_info() argument
60 enc->enc_pic.task_info.task_id++; in radeon_enc_task_info()
63 enc->enc_pic.task_info.allowed_max_num_feedbacks = 1; in radeon_enc_task_info()
65 enc->enc_pic.task_info.allowed_max_num_feedbacks = 0; in radeon_enc_task_info()
67 RADEON_ENC_BEGIN(enc->cmd.task_info); in radeon_enc_task_info()
68 enc->p_task_size = &enc->cs.current.buf[enc->cs.current.cdw++]; in radeon_enc_task_info()
[all …]
Dradeon_uvd_enc_1_1.c19 #define RADEON_ENC_CS(value) (enc->cs.current.buf[enc->cs.current.cdw++] = (value))
22 uint32_t *begin = &enc->cs.current.buf[enc->cs.current.cdw++]; \
25 radeon_uvd_enc_add_buffer(enc, (buf), RADEON_USAGE_READ, (domain), (off))
27 radeon_uvd_enc_add_buffer(enc, (buf), RADEON_USAGE_WRITE, (domain), (off))
29 radeon_uvd_enc_add_buffer(enc, (buf), RADEON_USAGE_READWRITE, (domain), (off))
31 *begin = (&enc->cs.current.buf[enc->cs.current.cdw] - begin) * 4; \
32 enc->total_task_size += *begin; \
37 static void radeon_uvd_enc_add_buffer(struct radeon_uvd_encoder *enc, struct pb_buffer_lean *buf, in radeon_uvd_enc_add_buffer() argument
41 enc->ws->cs_add_buffer(&enc->cs, buf, usage | RADEON_USAGE_SYNCHRONIZED, domain); in radeon_uvd_enc_add_buffer()
43 addr = enc->ws->buffer_get_virtual_address(buf); in radeon_uvd_enc_add_buffer()
[all …]
Dradeon_vce_52.c19 static void get_rate_control_param(struct rvce_encoder *enc, struct pipe_h264_enc_picture_desc *pic) in get_rate_control_param() argument
21 enc->enc_pic.rc.rc_method = pic->rate_ctrl[0].rate_ctrl_method; in get_rate_control_param()
22 enc->enc_pic.rc.target_bitrate = pic->rate_ctrl[0].target_bitrate; in get_rate_control_param()
23 enc->enc_pic.rc.peak_bitrate = pic->rate_ctrl[0].peak_bitrate; in get_rate_control_param()
24 enc->enc_pic.rc.quant_i_frames = pic->quant_i_frames; in get_rate_control_param()
25 enc->enc_pic.rc.quant_p_frames = pic->quant_p_frames; in get_rate_control_param()
26 enc->enc_pic.rc.quant_b_frames = pic->quant_b_frames; in get_rate_control_param()
27 enc->enc_pic.rc.gop_size = pic->gop_size; in get_rate_control_param()
28 enc->enc_pic.rc.frame_rate_num = pic->rate_ctrl[0].frame_rate_num; in get_rate_control_param()
29 enc->enc_pic.rc.frame_rate_den = pic->rate_ctrl[0].frame_rate_den; in get_rate_control_param()
[all …]
Dradeon_vcn_enc_3_0.c22 static void radeon_enc_session_info(struct radeon_encoder *enc) in radeon_enc_session_info() argument
24 RADEON_ENC_BEGIN(enc->cmd.session_info); in radeon_enc_session_info()
25 RADEON_ENC_CS(enc->enc_pic.session_info.interface_version); in radeon_enc_session_info()
26 RADEON_ENC_READWRITE(enc->si->res->buf, enc->si->res->domains, 0x0); in radeon_enc_session_info()
31 static void radeon_enc_spec_misc(struct radeon_encoder *enc) in radeon_enc_spec_misc() argument
33 enc->enc_pic.spec_misc.constrained_intra_pred_flag = 0; in radeon_enc_spec_misc()
34 enc->enc_pic.spec_misc.half_pel_enabled = 1; in radeon_enc_spec_misc()
35 enc->enc_pic.spec_misc.quarter_pel_enabled = 1; in radeon_enc_spec_misc()
36 enc->enc_pic.spec_misc.level_idc = enc->base.level; in radeon_enc_spec_misc()
37 enc->enc_pic.spec_misc.weighted_bipred_idc = 0; in radeon_enc_spec_misc()
[all …]
Dradeon_vcn_enc_2_0.c50 static void radeon_enc_op_preset(struct radeon_encoder *enc) in radeon_enc_op_preset() argument
54 if (enc->enc_pic.quality_modes.preset_mode == RENCODE_PRESET_MODE_SPEED && in radeon_enc_op_preset()
55 (enc->enc_pic.sample_adaptive_offset_enabled_flag && in radeon_enc_op_preset()
56 (u_reduce_video_profile(enc->base.profile) == PIPE_VIDEO_FORMAT_HEVC))) in radeon_enc_op_preset()
58 else if (enc->enc_pic.quality_modes.preset_mode == RENCODE_PRESET_MODE_QUALITY) in radeon_enc_op_preset()
60 else if (enc->enc_pic.quality_modes.preset_mode == RENCODE_PRESET_MODE_BALANCE) in radeon_enc_op_preset()
69 static void radeon_enc_quality_params(struct radeon_encoder *enc) in radeon_enc_quality_params() argument
71 enc->enc_pic.quality_params.vbaq_mode = enc->enc_pic.quality_modes.vbaq_mode; in radeon_enc_quality_params()
72 enc->enc_pic.quality_params.scene_change_sensitivity = 0; in radeon_enc_quality_params()
73 enc->enc_pic.quality_params.scene_change_min_idr_interval = 0; in radeon_enc_quality_params()
[all …]
Dradeon_vcn_enc_4_0.c40 static void radeon_enc_sq_begin(struct radeon_encoder *enc) in radeon_enc_sq_begin() argument
42 rvcn_sq_header(&enc->cs, &enc->sq, true); in radeon_enc_sq_begin()
43 enc->mq_begin(enc); in radeon_enc_sq_begin()
44 rvcn_sq_tail(&enc->cs, &enc->sq); in radeon_enc_sq_begin()
47 static void radeon_enc_sq_encode(struct radeon_encoder *enc) in radeon_enc_sq_encode() argument
49 rvcn_sq_header(&enc->cs, &enc->sq, true); in radeon_enc_sq_encode()
50 enc->mq_encode(enc); in radeon_enc_sq_encode()
51 rvcn_sq_tail(&enc->cs, &enc->sq); in radeon_enc_sq_encode()
54 static void radeon_enc_sq_destroy(struct radeon_encoder *enc) in radeon_enc_sq_destroy() argument
56 rvcn_sq_header(&enc->cs, &enc->sq, true); in radeon_enc_sq_destroy()
[all …]
Dradeon_vcn_enc.c24 static void radeon_vcn_enc_quality_modes(struct radeon_encoder *enc, in radeon_vcn_enc_quality_modes() argument
27 rvcn_enc_quality_modes_t *p = &enc->enc_pic.quality_modes; in radeon_vcn_enc_quality_modes()
33 if (u_reduce_video_profile(enc->base.profile) != PIPE_VIDEO_FORMAT_AV1 && in radeon_vcn_enc_quality_modes()
67 static uint32_t radeon_vcn_enc_blocks_in_frame(struct radeon_encoder *enc, in radeon_vcn_enc_blocks_in_frame() argument
71 bool is_h264 = u_reduce_video_profile(enc->base.profile) == PIPE_VIDEO_FORMAT_MPEG4_AVC; in radeon_vcn_enc_blocks_in_frame()
74 *width_in_block = PIPE_ALIGN_IN_BLOCK_SIZE(enc->base.width, block_length); in radeon_vcn_enc_blocks_in_frame()
75 *height_in_block = PIPE_ALIGN_IN_BLOCK_SIZE(enc->base.height, block_length); in radeon_vcn_enc_blocks_in_frame()
80 static void radeon_vcn_enc_get_intra_refresh_param(struct radeon_encoder *enc, in radeon_vcn_enc_get_intra_refresh_param() argument
86 enc->enc_pic.intra_refresh.intra_refresh_mode = RENCODE_INTRA_REFRESH_MODE_NONE; in radeon_vcn_enc_get_intra_refresh_param()
91 if (enc->enc_pic.spec_misc.b_picture_enabled || enc->enc_pic.num_temporal_layers > 1) { in radeon_vcn_enc_get_intra_refresh_param()
[all …]
Dradeon_uvd_enc.c34 static void radeon_uvd_enc_get_vui_param(struct radeon_uvd_encoder *enc, in radeon_uvd_enc_get_vui_param() argument
37 enc->enc_pic.vui_info.vui_parameters_present_flag = in radeon_uvd_enc_get_vui_param()
39 enc->enc_pic.vui_info.flags.aspect_ratio_info_present_flag = in radeon_uvd_enc_get_vui_param()
41 enc->enc_pic.vui_info.flags.timing_info_present_flag = in radeon_uvd_enc_get_vui_param()
43 enc->enc_pic.vui_info.flags.video_signal_type_present_flag = in radeon_uvd_enc_get_vui_param()
45 enc->enc_pic.vui_info.flags.colour_description_present_flag = in radeon_uvd_enc_get_vui_param()
47 enc->enc_pic.vui_info.flags.chroma_loc_info_present_flag = in radeon_uvd_enc_get_vui_param()
49 enc->enc_pic.vui_info.aspect_ratio_idc = pic->seq.aspect_ratio_idc; in radeon_uvd_enc_get_vui_param()
50 enc->enc_pic.vui_info.sar_width = pic->seq.sar_width; in radeon_uvd_enc_get_vui_param()
51 enc->enc_pic.vui_info.sar_height = pic->seq.sar_height; in radeon_uvd_enc_get_vui_param()
[all …]
Dradeon_vce.c33 static void flush(struct rvce_encoder *enc) in flush() argument
35 enc->ws->cs_flush(&enc->cs, PIPE_FLUSH_ASYNC, NULL); in flush()
36 enc->task_info_idx = 0; in flush()
37 enc->bs_idx = 0; in flush()
41 static void dump_feedback(struct rvce_encoder *enc, struct rvid_buffer *fb)
43 uint32_t *ptr = enc->ws->buffer_map(fb->res->buf, &enc->cs, PIPE_MAP_READ_WRITE);
62 enc->ws->buffer_unmap(fb->res->buf);
69 static void reset_cpb(struct rvce_encoder *enc) in reset_cpb() argument
73 list_inithead(&enc->cpb_slots); in reset_cpb()
74 for (i = 0; i < enc->cpb_num; ++i) { in reset_cpb()
[all …]
Dradeon_vce_40_2_2.c19 static void session(struct rvce_encoder *enc) in session() argument
22 RVCE_CS(enc->stream_handle); in session()
26 static void task_info(struct rvce_encoder *enc, uint32_t op, uint32_t dep, uint32_t fb_idx, in task_info() argument
31 if (enc->task_info_idx) { in task_info()
32 uint32_t offs = enc->cs.current.cdw - enc->task_info_idx + 3; in task_info()
34 enc->cs.current.buf[enc->task_info_idx] = offs; in task_info()
36 enc->task_info_idx = enc->cs.current.cdw; in task_info()
47 static void feedback(struct rvce_encoder *enc) in feedback() argument
50 RVCE_WRITE(enc->fb->res->buf, enc->fb->res->domains, 0x0); // feedbackRingAddressHi/Lo in feedback()
55 static void create(struct rvce_encoder *enc) in create() argument
[all …]
Dradeon_vcn_enc.h19 #define RADEON_ENC_CS(value) (enc->cs.current.buf[enc->cs.current.cdw++] = (value))
22 uint32_t *begin = &enc->cs.current.buf[enc->cs.current.cdw++]; \
25 radeon_enc_add_buffer(enc, (buf), RADEON_USAGE_READ, (domain), (off))
27 radeon_enc_add_buffer(enc, (buf), RADEON_USAGE_WRITE, (domain), (off))
29 radeon_enc_add_buffer(enc, (buf), RADEON_USAGE_READWRITE, (domain), (off))
31 *begin = (&enc->cs.current.buf[enc->cs.current.cdw] - begin) * 4; \
32 enc->total_task_size += *begin; \
36 unsigned int *low = &enc->cs.current.buf[enc->cs.current.cdw - 2]; \
37 unsigned int *high = &enc->cs.current.buf[enc->cs.current.cdw - 1]; \
189 void (*begin)(struct radeon_encoder *enc);
[all …]
/external/mesa3d/src/gallium/drivers/radeon/
Dradeon_vcn_enc_2_0.c76 static void radeon_enc_quality_params(struct radeon_encoder *enc) in radeon_enc_quality_params() argument
78 enc->enc_pic.quality_params.vbaq_mode = 0; in radeon_enc_quality_params()
79 enc->enc_pic.quality_params.scene_change_sensitivity = 0; in radeon_enc_quality_params()
80 enc->enc_pic.quality_params.scene_change_min_idr_interval = 0; in radeon_enc_quality_params()
81 enc->enc_pic.quality_params.two_pass_search_center_map_mode = 0; in radeon_enc_quality_params()
83 RADEON_ENC_BEGIN(enc->cmd.quality_params); in radeon_enc_quality_params()
84 RADEON_ENC_CS(enc->enc_pic.quality_params.vbaq_mode); in radeon_enc_quality_params()
85 RADEON_ENC_CS(enc->enc_pic.quality_params.scene_change_sensitivity); in radeon_enc_quality_params()
86 RADEON_ENC_CS(enc->enc_pic.quality_params.scene_change_min_idr_interval); in radeon_enc_quality_params()
87 RADEON_ENC_CS(enc->enc_pic.quality_params.two_pass_search_center_map_mode); in radeon_enc_quality_params()
[all …]
/external/expat/expat/lib/
Dxmltok_impl.c45 # define IS_INVALID_CHAR(enc, ptr, n) (0) argument
52 if (IS_INVALID_CHAR(enc, ptr, n)) { \
69 # define CHECK_NAME_CASE(n, enc, ptr, end, nextTokPtr) \ argument
73 if (IS_INVALID_CHAR(enc, ptr, n) || ! IS_NAME_CHAR(enc, ptr, n)) { \
80 # define CHECK_NAME_CASES(enc, ptr, end, nextTokPtr) \ argument
82 if (! IS_NAME_CHAR_MINBPC(enc, ptr)) { \
92 ptr += MINBPC(enc); \
94 CHECK_NAME_CASE(2, enc, ptr, end, nextTokPtr) \
95 CHECK_NAME_CASE(3, enc, ptr, end, nextTokPtr) \
96 CHECK_NAME_CASE(4, enc, ptr, end, nextTokPtr)
[all …]
/external/python/cpython3/Modules/expat/
Dxmltok_impl.c45 # define IS_INVALID_CHAR(enc, ptr, n) (0) argument
52 if (IS_INVALID_CHAR(enc, ptr, n)) { \
69 # define CHECK_NAME_CASE(n, enc, ptr, end, nextTokPtr) \ argument
73 if (IS_INVALID_CHAR(enc, ptr, n) || ! IS_NAME_CHAR(enc, ptr, n)) { \
80 # define CHECK_NAME_CASES(enc, ptr, end, nextTokPtr) \ argument
82 if (! IS_NAME_CHAR_MINBPC(enc, ptr)) { \
92 ptr += MINBPC(enc); \
94 CHECK_NAME_CASE(2, enc, ptr, end, nextTokPtr) \
95 CHECK_NAME_CASE(3, enc, ptr, end, nextTokPtr) \
96 CHECK_NAME_CASE(4, enc, ptr, end, nextTokPtr)
[all …]
/external/python/cpython2/Modules/expat/
Dxmltok_impl.c36 #define IS_INVALID_CHAR(enc, ptr, n) (0) argument
43 if (IS_INVALID_CHAR(enc, ptr, n)) { \
60 #define CHECK_NAME_CASE(n, enc, ptr, end, nextTokPtr) \ argument
64 if (!IS_NAME_CHAR(enc, ptr, n)) { \
71 #define CHECK_NAME_CASES(enc, ptr, end, nextTokPtr) \ argument
73 if (!IS_NAME_CHAR_MINBPC(enc, ptr)) { \
83 ptr += MINBPC(enc); \
85 CHECK_NAME_CASE(2, enc, ptr, end, nextTokPtr) \
86 CHECK_NAME_CASE(3, enc, ptr, end, nextTokPtr) \
87 CHECK_NAME_CASE(4, enc, ptr, end, nextTokPtr)
[all …]
/external/mesa3d/src/virtio/vulkan/
Dvn_cs.c52 vn_cs_encoder_sanity_check(struct vn_cs_encoder *enc) in vn_cs_encoder_sanity_check() argument
54 assert(enc->buffer_count <= enc->buffer_max); in vn_cs_encoder_sanity_check()
57 for (uint32_t i = 0; i < enc->buffer_count; i++) in vn_cs_encoder_sanity_check()
58 total_committed_size += enc->buffers[i].committed_size; in vn_cs_encoder_sanity_check()
59 assert(enc->total_committed_size == total_committed_size); in vn_cs_encoder_sanity_check()
61 if (enc->buffer_count) { in vn_cs_encoder_sanity_check()
63 &enc->buffers[enc->buffer_count - 1]; in vn_cs_encoder_sanity_check()
64 assert(cur_buf->base <= enc->cur && enc->cur <= enc->end && in vn_cs_encoder_sanity_check()
65 enc->end <= cur_buf->base + enc->current_buffer_size); in vn_cs_encoder_sanity_check()
67 assert(enc->cur == enc->end); in vn_cs_encoder_sanity_check()
[all …]
/external/brotli/scripts/
Dsources.lst35 c/enc/backward_references.c \
36 c/enc/backward_references_hq.c \
37 c/enc/bit_cost.c \
38 c/enc/block_splitter.c \
39 c/enc/brotli_bit_stream.c \
40 c/enc/cluster.c \
41 c/enc/command.c \
42 c/enc/compress_fragment.c \
43 c/enc/compress_fragment_two_pass.c \
44 c/enc/dictionary_hash.c \
[all …]
/external/mesa3d/src/gallium/drivers/r600/
Dradeon_vce.c58 static void (*get_pic_param)(struct rvce_encoder *enc,
64 static void flush(struct rvce_encoder *enc) in flush() argument
66 enc->ws->cs_flush(&enc->cs, PIPE_FLUSH_ASYNC, NULL); in flush()
67 enc->task_info_idx = 0; in flush()
68 enc->bs_idx = 0; in flush()
72 static void dump_feedback(struct rvce_encoder *enc, struct rvid_buffer *fb)
74 uint32_t *ptr = enc->ws->buffer_map(fb->res->buf, &enc->cs, PIPE_MAP_READ_WRITE);
93 enc->ws->buffer_unmap(fb->res->buf);
100 static void reset_cpb(struct rvce_encoder *enc) in reset_cpb() argument
104 list_inithead(&enc->cpb_slots); in reset_cpb()
[all …]
/external/mesa3d/src/util/
Dvl_bitstream.h28 vl_bitstream_encoder_clear(struct vl_bitstream_encoder *enc, in vl_bitstream_encoder_clear() argument
33 memset(enc, 0, sizeof(*enc)); in vl_bitstream_encoder_clear()
34 enc->bits_to_go = 32; in vl_bitstream_encoder_clear()
37 enc->bits = malloc(VL_BITSTREAM_MAX_BUFFER); in vl_bitstream_encoder_clear()
38 enc->bits_buffer_size = VL_BITSTREAM_MAX_BUFFER; in vl_bitstream_encoder_clear()
39 enc->internal_buffer = true; in vl_bitstream_encoder_clear()
41 enc->bits = (uint8_t *)buffer_base + buffer_offset; in vl_bitstream_encoder_clear()
42 enc->bits_buffer_size = buffer_limit; in vl_bitstream_encoder_clear()
47 vl_bitstream_encoder_free(struct vl_bitstream_encoder *enc) in vl_bitstream_encoder_free() argument
49 if (enc->internal_buffer) in vl_bitstream_encoder_free()
[all …]
/external/virglrenderer/src/venus/venus-protocol/
Dvn_protocol_renderer_types.h16 vn_encode_uint64_t(struct vn_cs_encoder *enc, const uint64_t *val) in vn_encode_uint64_t() argument
18 vn_encode(enc, 8, val, sizeof(*val)); in vn_encode_uint64_t()
28 vn_encode_uint64_t_array(struct vn_cs_encoder *enc, const uint64_t *val, uint32_t count) in vn_encode_uint64_t_array() argument
32 vn_encode(enc, size, val, size); in vn_encode_uint64_t_array()
46 vn_encode_int32_t(struct vn_cs_encoder *enc, const int32_t *val) in vn_encode_int32_t() argument
48 vn_encode(enc, 4, val, sizeof(*val)); in vn_encode_int32_t()
58 vn_encode_int32_t_array(struct vn_cs_encoder *enc, const int32_t *val, uint32_t count) in vn_encode_int32_t_array() argument
62 vn_encode(enc, size, val, size); in vn_encode_int32_t_array()
76 vn_encode_VkStructureType(struct vn_cs_encoder *enc, const VkStructureType *val) in vn_encode_VkStructureType() argument
78 vn_encode_int32_t(enc, (const int32_t *)val); in vn_encode_VkStructureType()
[all …]
/external/cronet/third_party/brotli/
DBUILD.gn75 "enc/backward_references_hq.c",
76 "enc/backward_references_hq.h",
77 "enc/backward_references_inc.h",
78 "enc/backward_references.c",
79 "enc/backward_references.h",
80 "enc/bit_cost_inc.h",
81 "enc/bit_cost.c",
82 "enc/bit_cost.h",
83 "enc/block_encoder_inc.h",
84 "enc/block_splitter_inc.h",
[all …]
/external/mesa3d/src/virtio/venus-protocol/
Dvn_protocol_driver_pipeline.h27 vn_encode_VkSpecializationMapEntry(struct vn_cs_encoder *enc, const VkSpecializationMapEntry *val) in vn_encode_VkSpecializationMapEntry() argument
29 vn_encode_uint32_t(enc, &val->constantID); in vn_encode_VkSpecializationMapEntry()
30 vn_encode_uint32_t(enc, &val->offset); in vn_encode_VkSpecializationMapEntry()
31 vn_encode_size_t(enc, &val->size); in vn_encode_VkSpecializationMapEntry()
59 vn_encode_VkSpecializationInfo(struct vn_cs_encoder *enc, const VkSpecializationInfo *val) in vn_encode_VkSpecializationInfo() argument
61 vn_encode_uint32_t(enc, &val->mapEntryCount); in vn_encode_VkSpecializationInfo()
63 vn_encode_array_size(enc, val->mapEntryCount); in vn_encode_VkSpecializationInfo()
65 vn_encode_VkSpecializationMapEntry(enc, &val->pMapEntries[i]); in vn_encode_VkSpecializationInfo()
67 vn_encode_array_size(enc, 0); in vn_encode_VkSpecializationInfo()
69 vn_encode_size_t(enc, &val->dataSize); in vn_encode_VkSpecializationInfo()
[all …]
Dvn_protocol_driver_queue.h65 vn_encode_VkDeviceGroupSubmitInfo_pnext(struct vn_cs_encoder *enc, const void *val) in vn_encode_VkDeviceGroupSubmitInfo_pnext() argument
68 vn_encode_simple_pointer(enc, NULL); in vn_encode_VkDeviceGroupSubmitInfo_pnext()
72 vn_encode_VkDeviceGroupSubmitInfo_self(struct vn_cs_encoder *enc, const VkDeviceGroupSubmitInfo *va… in vn_encode_VkDeviceGroupSubmitInfo_self() argument
75 vn_encode_uint32_t(enc, &val->waitSemaphoreCount); in vn_encode_VkDeviceGroupSubmitInfo_self()
77 vn_encode_array_size(enc, val->waitSemaphoreCount); in vn_encode_VkDeviceGroupSubmitInfo_self()
78 vn_encode_uint32_t_array(enc, val->pWaitSemaphoreDeviceIndices, val->waitSemaphoreCount); in vn_encode_VkDeviceGroupSubmitInfo_self()
80 vn_encode_array_size(enc, 0); in vn_encode_VkDeviceGroupSubmitInfo_self()
82 vn_encode_uint32_t(enc, &val->commandBufferCount); in vn_encode_VkDeviceGroupSubmitInfo_self()
84 vn_encode_array_size(enc, val->commandBufferCount); in vn_encode_VkDeviceGroupSubmitInfo_self()
85 vn_encode_uint32_t_array(enc, val->pCommandBufferDeviceMasks, val->commandBufferCount); in vn_encode_VkDeviceGroupSubmitInfo_self()
[all …]
Dvn_protocol_driver_render_pass.h33 vn_encode_VkAttachmentDescription(struct vn_cs_encoder *enc, const VkAttachmentDescription *val) in vn_encode_VkAttachmentDescription() argument
35 vn_encode_VkFlags(enc, &val->flags); in vn_encode_VkAttachmentDescription()
36 vn_encode_VkFormat(enc, &val->format); in vn_encode_VkAttachmentDescription()
37 vn_encode_VkSampleCountFlagBits(enc, &val->samples); in vn_encode_VkAttachmentDescription()
38 vn_encode_VkAttachmentLoadOp(enc, &val->loadOp); in vn_encode_VkAttachmentDescription()
39 vn_encode_VkAttachmentStoreOp(enc, &val->storeOp); in vn_encode_VkAttachmentDescription()
40 vn_encode_VkAttachmentLoadOp(enc, &val->stencilLoadOp); in vn_encode_VkAttachmentDescription()
41 vn_encode_VkAttachmentStoreOp(enc, &val->stencilStoreOp); in vn_encode_VkAttachmentDescription()
42 vn_encode_VkImageLayout(enc, &val->initialLayout); in vn_encode_VkAttachmentDescription()
43 vn_encode_VkImageLayout(enc, &val->finalLayout); in vn_encode_VkAttachmentDescription()
[all …]
/external/libdrm/tests/amdgpu/
Dvce_tests.c80 static struct amdgpu_vce_encode enc; variable
172 memset(&enc, 0, sizeof(struct amdgpu_vce_encode)); in suite_vce_tests_init()
292 enc.width = vce_create[6]; in amdgpu_cs_vce_create()
293 enc.height = vce_create[7]; in amdgpu_cs_vce_create()
296 alloc_resource(&enc.fb[0], 4096, AMDGPU_GEM_DOMAIN_GTT); in amdgpu_cs_vce_create()
297 resources[num_resources++] = enc.fb[0].handle; in amdgpu_cs_vce_create()
306 ib_cpu[len + 8] = ALIGN(enc.width, align); in amdgpu_cs_vce_create()
307 ib_cpu[len + 9] = ALIGN(enc.width, align); in amdgpu_cs_vce_create()
316 ib_cpu[len + 2] = enc.fb[0].addr >> 32; in amdgpu_cs_vce_create()
317 ib_cpu[len + 3] = enc.fb[0].addr; in amdgpu_cs_vce_create()
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